linux-kernel - Re: [PATCH v4 1/3] dt-bindings: mmc: renesas,sdhi: Document RZ/V2H(P) support

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Message-ID: <CA+V-a8uJ-jv65fK7=XYtMvCCiEbFKcRHW3xNj8SQd2TJ++43QQ@mail.gmail.com>
Date: Thu, 4 Jul 2024 19:27:13 +0100
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Wolfram Sang <wsa+renesas@...g-engineering.com>
Cc: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>, 
	Ulf Hansson <ulf.hansson@...aro.org>, Rob Herring <robh@...nel.org>, 
	Geert Uytterhoeven <geert+renesas@...der.be>, Prabhakar <prabhakar.csengg@...il.com>, 
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>, Biju Das <biju.das.jz@...renesas.com>, 
	linux-renesas-soc@...r.kernel.org, linux-kernel@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-mmc@...r.kernel.org, 
	Magnus Damm <magnus.damm@...il.com>, Conor Dooley <conor+dt@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>
Subject: Re: [PATCH v4 1/3] dt-bindings: mmc: renesas,sdhi: Document RZ/V2H(P) support

Hi Wolfram,

On Wed, Jul 3, 2024 at 10:38 AM Wolfram Sang
<wsa+renesas@...g-engineering.com> wrote:
>
> On Wed, Jun 26, 2024 at 02:23:39PM +0100, Prabhakar wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> >
> > The SD/MMC block on the RZ/V2H(P) ("R9A09G057") SoC is similar to that
> > of the R-Car Gen3, but it has some differences:
> > - HS400 is not supported.
> > - It supports the SD_IOVS bit to control the IO voltage level.
> > - It supports fixed address mode.
> >
> > To accommodate these differences, a SoC-specific 'renesas,sdhi-r9a09g057'
> > compatible string is added.
> >
> > A 'vqmmc-regulator' object is introduced to handle the power enable (PWEN)
> > and voltage level switching for the SD/MMC.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Can we have an example here? I can read DTS snippets better than YAML
> code :/ Also wondering about the "regulator-compatible" property but
> maybe the example makes the problem clear?
>
You mean in the commit message or comment section? (I had added below
in the cover letter)

SoC DTSI node:
sdhi1: mmc@...10000 {
        compatible = "renesas,sdhi-r9a09g057";
        reg = <0x0 0x15c10000 0 0x10000>;
        interrupts = <GIC_SPI 737 IRQ_TYPE_LEVEL_HIGH>,
                        <GIC_SPI 738 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&cpg CPG_MOD 167>,
                        <&cpg CPG_MOD 169>,
                        <&cpg CPG_MOD 168>,
                        <&cpg CPG_MOD 170>;
        clock-names = "core", "clkh", "cd", "aclk";
        resets = <&cpg 168>;
        power-domains = <&cpg>;
        status = "disabled";

        vqmmc_sdhi1: vqmmc-regulator {
                regulator-compatible = "vqmmc-r9a09g057-regulator";
                regulator-name = "sdhi1-vqmmc-regulator";
                regulator-min-microvolt = <1800000>;
                regulator-max-microvolt = <3300000>;
                status = "disabled";
        };
};

Board DTS:
&sdhi1 {
        pinctrl-0 = <&sdhi1_pins>;
        pinctrl-1 = <&sdhi1_pins>;
        pinctrl-names = "default", "state_uhs";
        vmmc-supply = <&reg_3p3v>;
        vqmmc-supply = <&vqmmc_sdhi1>;
        bus-width = <4>;
        sd-uhs-sdr50;
        sd-uhs-sdr104;
        status = "okay";
};

&vqmmc_sdhi1 {
     status = "okay";
};

Based on feedback from Conor, we cannot use the regulator-compatible
property. This would require us to implement separate drivers (one for
VMMC and another for VQMMC), which I believe would necessitate the use
of regmap. Currently, this seems unnecessary for controlling the two
bits as a regulator. As Geert previously pointed out, the PWEN and
IOVS pins can always be multiplexed as GPIOs on the RZ/V2H SoC (as is
done on R-Car devices). Therefore, I am inclined to drop the internal
regulator support for now.

Let me know your thoughts.

Cheers,
Prabhakar