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Message-ID: <99ff395019901c5c1a7b298481c8261b30fdbd01.camel@icenowy.me>
Date: Thu, 04 Jul 2024 10:00:52 +0800
From: Icenowy Zheng <uwu@...nowy.me>
To: Bjorn Helgaas <helgaas@...nel.org>, Jiaxun Yang <jiaxun.yang@...goat.com>
Cc: Christian König <christian.koenig@....com>, Huang Rui
<ray.huang@....com>, Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann
<tzimmermann@...e.de>, David Airlie <airlied@...il.com>, Daniel Vetter
<daniel@...ll.ch>, bhelgaas@...gle.com, dri-devel@...ts.freedesktop.org,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org
Subject: Re: PCIe coherency in spec (was: [RFC PATCH 2/2] drm/ttm: downgrade
cached to write_combined when snooping not available)
在 2024-07-03星期三的 16:08 -0500,Bjorn Helgaas写道:
> On Wed, Jul 03, 2024 at 04:52:30PM +0800, Jiaxun Yang wrote:
> > 在2024年7月2日七月 下午6:03,Jiaxun Yang写道:
> > > 在2024年7月2日七月 下午5:27,Christian König写道:
> > > > Am 02.07.24 um 11:06 schrieb Icenowy Zheng:
> > > > > [SNIP] However I don't think the definition of the AGP spec
> > > > > could apply on all
> > > > > PCI(e) implementations. The AGP spec itself don't apply on
> > > > > implementations that do not implement AGP (which is the most
> > > > > PCI(e)
> > > > > implementations today), and it's not in the reference list of
> > > > > the PCIe
> > > > > spec, so it does no help on this context.
> > > > No, exactly that is not correct.
> > > >
> > > > See as I explained the No-Snoop extension to PCIe was created
> > > > to help
> > > > with AGP support and later merged into the base PCIe
> > > > specification.
> > > >
> > > > So the AGP spec is now part of the PCIe spec.
> >
> > Hi Bjorn & linux-pci folks,
> >
> > It seems like we have some disputes on interpretation pf PCIe
> > specification.
> >
> > We are seeking your expertise on the question: Does PCIe
> > specification mandate Cache coherency via snoop?
>
> I'm not qualified to opine on this. I'd say it's a question for the
> PCI SIG protocol workgroup. https://forum.pcisig.com/ is a place to
> start.
Sorry for the disturbance.
As individual hacker, I am not eligble of being a PCI-SIG member and
join the discussion there.
So I here want to ask a question as an individual hacker: what's the
policy of linux-pci towards these non-coherent PCIe implementations?
If the sentences of Christian is right, these implementations are just
out-of-spec, should them get purged out of the kernel, or at least
raising a warning that some HW won't work because of inconformant
implementation?
>
> Bjorn
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