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Message-ID: <20240704135653.2969532-1-ciprianmarian.costea@oss.nxp.com>
Date: Thu, 4 Jul 2024 16:56:53 +0300
From: Ciprian Costea <ciprianmarian.costea@....nxp.com>
To: Chester Lin <chester62515@...il.com>,
Matthias Brugger <mbrugger@...e.com>,
Ghennadi Procopciuc <ghennadi.procopciuc@....nxp.com>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org,
imx@...ts.linux.dev,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
s32@....com,
Ciprian Costea <ciprianmarian.costea@....nxp.com>
Subject: [PATCH v2] arm64: dts: s32g: Disable usdhc write-protect
NXP S32G2/S32G3 SoC based platforms do not
use a pin for SD-Card write protection used by
the uSDHC controller.
Hence, adding 'disable-wp' usdhc device-tree property in order to fix
observed warnings on SD boot as the following:
"host does not support reading read-only switch, assuming write-enable"
Signed-off-by: Ciprian Costea <ciprianmarian.costea@....nxp.com>
---
arch/arm64/boot/dts/freescale/s32g274a-evb.dts | 1 +
arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts | 1 +
arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts | 3 ++-
3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
index 00070c949e2a..dbe498798bd9 100644
--- a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
+++ b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
@@ -34,5 +34,6 @@ &uart0 {
};
&usdhc0 {
+ disable-wp;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
index b3fc12899cae..ab1e5caaeae7 100644
--- a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
+++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
@@ -40,5 +40,6 @@ &uart1 {
};
&usdhc0 {
+ disable-wp;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts b/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts
index 9d674819876e..176e5af191c8 100644
--- a/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts
+++ b/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
- * Copyright 2021-2023 NXP
+ * Copyright 2021-2024 NXP
*
* NXP S32G3 Reference Design Board 3 (S32G-VNP-RDB3)
*/
@@ -41,5 +41,6 @@ &uart1 {
&usdhc0 {
bus-width = <8>;
+ disable-wp;
status = "okay";
};
--
2.45.2
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