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Message-ID: <20240705060650.243497-2-chenhuacai@loongson.cn>
Date: Fri, 5 Jul 2024 14:06:48 +0800
From: Huacai Chen <chenhuacai@...ngson.cn>
To: "Rafael J . Wysocki" <rafael@...nel.org>,
Viresh Kumar <viresh.kumar@...aro.org>,
Huacai Chen <chenhuacai@...nel.org>
Cc: loongarch@...ts.linux.dev,
linux-pm@...r.kernel.org,
linux-kernel@...r.kernel.org,
Xuerui Wang <kernel@...0n.name>,
Jiaxun Yang <jiaxun.yang@...goat.com>,
Huacai Chen <chenhuacai@...ngson.cn>,
Binbin Zhou <zhoubinbin@...ngson.cn>
Subject: [PATCH V3 1/2] LoongArch: Add architectural preparation for CPUFreq
Add architectural preparation for CPUFreq driver, including: Kconfig,
register definition and platform device registration.
Some of LoongArch processors support DVFS, their IOCSR.FEATURES has
IOCSRF_FREQSCALE set. And they has a micro-core in the package called
SMC (System Management Controller) to scale frequency, voltage, etc.
Signed-off-by: Binbin Zhou <zhoubinbin@...ngson.cn>
Signed-off-by: Huacai Chen <chenhuacai@...ngson.cn>
---
arch/loongarch/Kconfig | 1 +
arch/loongarch/include/asm/loongarch.h | 3 +++
arch/loongarch/power/platform.c | 15 +++++++++++++++
3 files changed, 19 insertions(+)
diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
index e346b5b0a5ca..692adf6aad7e 100644
--- a/arch/loongarch/Kconfig
+++ b/arch/loongarch/Kconfig
@@ -701,6 +701,7 @@ config ARCH_HIBERNATION_POSSIBLE
source "kernel/power/Kconfig"
source "drivers/acpi/Kconfig"
+source "drivers/cpufreq/Kconfig"
endmenu
diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/include/asm/loongarch.h
index c430df595376..1501f0f8b06e 100644
--- a/arch/loongarch/include/asm/loongarch.h
+++ b/arch/loongarch/include/asm/loongarch.h
@@ -1061,11 +1061,14 @@
#define LOONGARCH_IOCSR_NODECNT 0x408
#define LOONGARCH_IOCSR_MISC_FUNC 0x420
+#define IOCSR_MISC_FUNC_SOFT_INT BIT_ULL(10)
#define IOCSR_MISC_FUNC_TIMER_RESET BIT_ULL(21)
#define IOCSR_MISC_FUNC_EXT_IOI_EN BIT_ULL(48)
#define LOONGARCH_IOCSR_CPUTEMP 0x428
+#define LOONGARCH_IOCSR_SMCMBX 0x51c
+
/* PerCore CSR, only accessible by local cores */
#define LOONGARCH_IOCSR_IPI_STATUS 0x1000
#define LOONGARCH_IOCSR_IPI_EN 0x1004
diff --git a/arch/loongarch/power/platform.c b/arch/loongarch/power/platform.c
index 4b5d82643c23..0909729dc2e1 100644
--- a/arch/loongarch/power/platform.c
+++ b/arch/loongarch/power/platform.c
@@ -34,6 +34,21 @@ void enable_pci_wakeup(void)
acpi_write_bit_register(ACPI_BITREG_PCIEXP_WAKE_DISABLE, 0);
}
+static struct platform_device loongson3_cpufreq_device = {
+ .name = "loongson3_cpufreq",
+ .id = -1,
+};
+
+static int __init loongson_cpufreq_init(void)
+{
+ if (!cpu_has_scalefreq)
+ return -ENODEV;
+
+ return platform_device_register(&loongson3_cpufreq_device);
+}
+
+arch_initcall(loongson_cpufreq_init);
+
static void default_suspend_addr(void)
{
acpi_enter_sleep_state(ACPI_STATE_S3);
--
2.43.5
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