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Message-ID:
<SY4P282MB26240D98F157B616B3AA2E2EF9DF2@SY4P282MB2624.AUSP282.PROD.OUTLOOK.COM>
Date: Fri, 5 Jul 2024 18:57:34 +0800
From: "zheng.dongxiong" <zheng.dongxiong@...look.com>
To: manivannan.sadhasivam@...aro.org,
fancer.lancer@...il.com,
vkoul@...nel.org
Cc: dmaengine@...r.kernel.org,
linux-kernel@...r.kernel.org,
"zheng.dongxiong" <zheng.dongxiong@...look.com>
Subject: [PATCH RESEND 1/2] dmaengine: dw-edma: Move "Set consumer cycle" into first condition in dw_hdma_v0_core_start()
Two or more chunks are used in a transfer,
Consumer cycle only needs to be set on the first transfer.
Signed-off-by: zheng.dongxiong <zheng.dongxiong@...look.com>
---
drivers/dma/dw-edma/dw-hdma-v0-core.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c b/drivers/dma/dw-edma/dw-hdma-v0-core.c
index 10e8f0715..d77051d1e 100644
--- a/drivers/dma/dw-edma/dw-hdma-v0-core.c
+++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c
@@ -262,10 +262,10 @@ static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first)
lower_32_bits(chunk->ll_region.paddr));
SET_CH_32(dw, chan->dir, chan->id, llp.msb,
upper_32_bits(chunk->ll_region.paddr));
+ /* Set consumer cycle */
+ SET_CH_32(dw, chan->dir, chan->id, cycle_sync,
+ HDMA_V0_CONSUMER_CYCLE_STAT | HDMA_V0_CONSUMER_CYCLE_BIT);
}
- /* Set consumer cycle */
- SET_CH_32(dw, chan->dir, chan->id, cycle_sync,
- HDMA_V0_CONSUMER_CYCLE_STAT | HDMA_V0_CONSUMER_CYCLE_BIT);
dw_hdma_v0_sync_ll_data(chunk);
--
2.34.1
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