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Message-Id: <20240705-b4-mips-ipi-improvements-v2-9-2d50b56268e8@flygoat.com>
Date: Fri, 05 Jul 2024 22:17:01 +0800
From: Jiaxun Yang <jiaxun.yang@...goat.com>
To: Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Florian Fainelli <florian.fainelli@...adcom.com>,
Broadcom internal kernel review list <bcm-kernel-feedback-list@...adcom.com>,
Huacai Chen <chenhuacai@...nel.org>, Thomas Gleixner <tglx@...utronix.de>,
Serge Semin <fancer.lancer@...il.com>, Paul Burton <paulburton@...nel.org>
Cc: linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org,
Jiaxun Yang <jiaxun.yang@...goat.com>
Subject: [PATCH v2 09/10] irqchip: irq-mips-cpu: Rework software IRQ
handling flow
Remove unnecessary irq_chip hooks for software interrupts,
and don't mask them in ack hook to match kernel's expectation
on handling flow.
Create a irq_chip for regular (non-MT) mode software interrupts
so they will be acked as well.
Signed-off-by: Jiaxun Yang <jiaxun.yang@...goat.com>
---
drivers/irqchip/irq-mips-cpu.c | 57 +++++++++++++++++++++++++++++-------------
1 file changed, 39 insertions(+), 18 deletions(-)
diff --git a/drivers/irqchip/irq-mips-cpu.c b/drivers/irqchip/irq-mips-cpu.c
index 7b3501485d95..4854c06ce652 100644
--- a/drivers/irqchip/irq-mips-cpu.c
+++ b/drivers/irqchip/irq-mips-cpu.c
@@ -49,7 +49,21 @@ static inline void mask_mips_irq(struct irq_data *d)
irq_disable_hazard();
}
-static struct irq_chip mips_cpu_irq_controller = {
+static unsigned int mips_sw_irq_startup(struct irq_data *d)
+{
+ clear_c0_cause(C_SW0 << d->hwirq);
+ back_to_back_c0_hazard();
+ unmask_mips_irq(d);
+ return 0;
+}
+
+static void mips_sw_irq_ack(struct irq_data *d)
+{
+ clear_c0_cause(C_SW0 << d->hwirq);
+ back_to_back_c0_hazard();
+}
+
+static const struct irq_chip mips_cpu_irq_controller = {
.name = "MIPS",
.irq_ack = mask_mips_irq,
.irq_mask = mask_mips_irq,
@@ -60,11 +74,19 @@ static struct irq_chip mips_cpu_irq_controller = {
.irq_enable = unmask_mips_irq,
};
+static const struct irq_chip mips_cpu_sw_irq_controller = {
+ .name = "MIPS",
+ .irq_startup = mips_sw_irq_startup,
+ .irq_ack = mips_sw_irq_ack,
+ .irq_mask = mask_mips_irq,
+ .irq_unmask = unmask_mips_irq,
+};
+
+#ifdef CONFIG_MIPS_MT
/*
* Basically the same as above but taking care of all the MT stuff
*/
-
-static unsigned int mips_mt_cpu_irq_startup(struct irq_data *d)
+static unsigned int mips_mt_sw_irq_startup(struct irq_data *d)
{
unsigned int vpflags = dvpe();
@@ -76,14 +98,14 @@ static unsigned int mips_mt_cpu_irq_startup(struct irq_data *d)
/*
* While we ack the interrupt interrupts are disabled and thus we don't need
- * to deal with concurrency issues. Same for mips_cpu_irq_end.
+ * to deal with concurrency issues.
*/
-static void mips_mt_cpu_irq_ack(struct irq_data *d)
+static void mips_mt_sw_irq_ack(struct irq_data *d)
{
unsigned int vpflags = dvpe();
+
clear_c0_cause(C_SW0 << d->hwirq);
evpe(vpflags);
- mask_mips_irq(d);
}
#ifdef CONFIG_GENERIC_IRQ_IPI
@@ -108,21 +130,17 @@ static void mips_mt_send_ipi(struct irq_data *d, unsigned int cpu)
}
#endif /* CONFIG_GENERIC_IRQ_IPI */
-
-static struct irq_chip mips_mt_cpu_irq_controller = {
+static const struct irq_chip mips_mt_cpu_irq_controller = {
.name = "MIPS",
- .irq_startup = mips_mt_cpu_irq_startup,
- .irq_ack = mips_mt_cpu_irq_ack,
+ .irq_startup = mips_mt_sw_irq_startup,
+ .irq_ack = mips_mt_sw_irq_ack,
.irq_mask = mask_mips_irq,
- .irq_mask_ack = mips_mt_cpu_irq_ack,
.irq_unmask = unmask_mips_irq,
- .irq_eoi = unmask_mips_irq,
- .irq_disable = mask_mips_irq,
- .irq_enable = unmask_mips_irq,
#ifdef CONFIG_GENERIC_IRQ_IPI
.ipi_send_single = mips_mt_send_ipi,
#endif
};
+#endif
asmlinkage void __weak plat_irq_dispatch(void)
{
@@ -152,11 +170,14 @@ asmlinkage void __weak plat_irq_dispatch(void)
static int mips_cpu_intc_map(struct irq_domain *d, unsigned int irq,
irq_hw_number_t hw)
{
- struct irq_chip *chip;
+ const struct irq_chip *chip;
- if (hw < 2 && cpu_has_mipsmt) {
- /* Software interrupts are used for MT/CMT IPI */
- chip = &mips_mt_cpu_irq_controller;
+ if (hw < 2) {
+ chip = &mips_cpu_sw_irq_controller;
+#ifdef CONFIG_MIPS_MT
+ if (cpu_has_mipsmt)
+ chip = &mips_mt_cpu_irq_controller;
+#endif
} else {
chip = &mips_cpu_irq_controller;
}
--
2.45.2
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