linux-kernel - Re: [PATCH v3 08/11] perf/x86: Enable NMI source reporting for perfmon

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Message-ID: <20240706154951.4852b8c4@jacob-builder>
Date: Sat, 6 Jul 2024 15:49:51 -0700
From: Jacob Pan <jacob.jun.pan@...ux.intel.com>
To: "Liang, Kan" <kan.liang@...ux.intel.com>
Cc: X86 Kernel <x86@...nel.org>, Sean Christopherson <seanjc@...gle.com>,
 LKML <linux-kernel@...r.kernel.org>, Thomas Gleixner <tglx@...utronix.de>,
 Dave Hansen <dave.hansen@...el.com>, "H. Peter Anvin" <hpa@...or.com>, Ingo
 Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>, Xin Li
 <xin3.li@...el.com>, linux-perf-users@...r.kernel.org, Peter Zijlstra
 <peterz@...radead.org>, Paolo Bonzini <pbonzini@...hat.com>, Tony Luck
 <tony.luck@...el.com>, Andy Lutomirski <luto@...nel.org>, acme@...nel.org,
 Andi Kleen <andi.kleen@...el.com>, "Mehta, Sohil" <sohil.mehta@...el.com>,
 Zeng Guang <guang.zeng@...el.com>, jacob.jun.pan@...ux.intel.com
Subject: Re: [PATCH v3 08/11] perf/x86: Enable NMI source reporting for
 perfmon


On Thu, 4 Jul 2024 10:44:23 -0400, "Liang, Kan" <kan.liang@...ux.intel.com>
wrote:

> On 2024-06-28 4:18 p.m., Jacob Pan wrote:
> > Program the designated NMI source vector into the performance monitoring
> > interrupt (PMI) of the local vector table. PMI handler will be directly
> > invoked when its NMI is generated. This avoids the latency of calling
> > all NMI handlers blindly.
> > 
> > Co-developed-by: Zeng Guang <guang.zeng@...el.com>
> > Signed-off-by: Zeng Guang <guang.zeng@...el.com>
> > Signed-off-by: Jacob Pan <jacob.jun.pan@...ux.intel.com>
> > 
> > ---
> > v3: Program NMI source vector in PVTPC unconditionally (HPA)
> > v2: Fix a compile error apic_perfmon_ctr is undefined in i386 config
> > ---
> >  arch/x86/events/core.c       | 6 ++++--
> >  arch/x86/events/intel/core.c | 6 +++---
> >  arch/x86/include/asm/apic.h  | 1 +
> >  3 files changed, 8 insertions(+), 5 deletions(-)
> > 
> > diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> > index 1ef2201e48ac..be75bdcdd400 100644
> > --- a/arch/x86/events/core.c
> > +++ b/arch/x86/events/core.c
> > @@ -46,6 +46,7 @@
> >  
> >  struct x86_pmu x86_pmu __read_mostly;
> >  static struct pmu pmu;
> > +u32 apic_perfmon_ctr = APIC_DM_NMI;>
> >  DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = {
> >  	.enabled = 1,
> > @@ -1680,7 +1681,7 @@ int x86_pmu_handle_irq(struct pt_regs *regs)
> >  	 * This generic handler doesn't seem to have any issues where
> > the
> >  	 * unmasking occurs so it was left at the top.
> >  	 */
> > -	apic_write(APIC_LVTPC, APIC_DM_NMI);
> > +	apic_write(APIC_LVTPC, apic_perfmon_ctr);
> >  
> >  	for (idx = 0; idx < x86_pmu.num_counters; idx++) {
> >  		if (!test_bit(idx, cpuc->active_mask))
> > @@ -1723,7 +1724,8 @@ void perf_events_lapic_init(void)
> >  	/*
> >  	 * Always use NMI for PMU
> >  	 */
> > -	apic_write(APIC_LVTPC, APIC_DM_NMI);
> > +	apic_perfmon_ctr |= NMI_SOURCE_VEC_PMI;
> > +	apic_write(APIC_LVTPC, apic_perfmon_ctr);  
> 
> 
> It looks like the same value is written unconditionally.
> 
> Why not use a macro, e.g., APIC_DM_NMI_WITH_SOURCE, to replace the
> variable?
> 
yes, it is unconditional now. I will use the following:

--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -30,6 +30,8 @@
 #define APIC_EXTNMI_ALL                1
 #define APIC_EXTNMI_NONE       2

+#define APIC_PERF_NMI          (APIC_DM_NMI | NMI_SOURCE_VEC_PMI)


Thanks,

Jacob