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Message-ID: <7b03c38f44f295a5484d0162a193f41b39039b85.camel@pengutronix.de>
Date: Mon, 08 Jul 2024 11:37:13 +0200
From: Philipp Zabel <p.zabel@...gutronix.de>
To: Jim Quinlan <james.quinlan@...adcom.com>, Stanimir Varbanov
	 <svarbanov@...e.de>
Cc: linux-pci@...r.kernel.org, Nicolas Saenz Julienne <nsaenz@...nel.org>, 
 Bjorn Helgaas <bhelgaas@...gle.com>, Lorenzo Pieralisi
 <lorenzo.pieralisi@....com>, Cyril Brulebois <kibi@...ian.org>,
 bcm-kernel-feedback-list@...adcom.com, jim2101024@...il.com,  Florian
 Fainelli <florian.fainelli@...adcom.com>, Lorenzo Pieralisi
 <lpieralisi@...nel.org>, Krzysztof Wilczyński
 <kw@...ux.com>, Rob Herring <robh@...nel.org>, "moderated list:BROADCOM
 BCM2711/BCM2835 ARM ARCHITECTURE" <linux-rpi-kernel@...ts.infradead.org>,
 "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
 <linux-arm-kernel@...ts.infradead.org>, open list
 <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 04/12] PCI: brcmstb: Use swinit reset if available

On Fr, 2024-07-05 at 13:46 -0400, Jim Quinlan wrote:
> On Thu, Jul 4, 2024 at 8:56 AM Stanimir Varbanov <svarbanov@...e.de> wrote:
> > 
> > Hi Jim,
> > 
> > On 7/3/24 21:02, Jim Quinlan wrote:
> > > The 7712 SOC adds a software init reset device for the PCIe HW.
> > > If found in the DT node, use it.
> > > 
> > > Signed-off-by: Jim Quinlan <james.quinlan@...adcom.com>
> > > ---
> > >  drivers/pci/controller/pcie-brcmstb.c | 19 +++++++++++++++++++
> > >  1 file changed, 19 insertions(+)
> > > 
> > > diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
> > > index 4104c3668fdb..69926ee5c961 100644
> > > --- a/drivers/pci/controller/pcie-brcmstb.c
> > > +++ b/drivers/pci/controller/pcie-brcmstb.c
> > > @@ -266,6 +266,7 @@ struct brcm_pcie {
> > >       struct reset_control    *rescal;
> > >       struct reset_control    *perst_reset;
> > >       struct reset_control    *bridge;
> > > +     struct reset_control    *swinit;
> > >       int                     num_memc;
> > >       u64                     memc_size[PCIE_BRCM_MAX_MEMC];
> > >       u32                     hw_rev;
> > > @@ -1626,6 +1627,13 @@ static int brcm_pcie_probe(struct platform_device *pdev)
> > >               dev_err(&pdev->dev, "could not enable clock\n");
> > >               return ret;
> > >       }
> > > +
> > > +     pcie->swinit = devm_reset_control_get_optional_exclusive(&pdev->dev, "swinit");
> > > +     if (IS_ERR(pcie->swinit)) {
> > > +             ret = dev_err_probe(&pdev->dev, PTR_ERR(pcie->swinit),
> > > +                                 "failed to get 'swinit' reset\n");
> > > +             goto clk_out;
> > > +     }
> > >       pcie->rescal = devm_reset_control_get_optional_shared(&pdev->dev, "rescal");
> > >       if (IS_ERR(pcie->rescal)) {
> > >               ret = PTR_ERR(pcie->rescal);
> > > @@ -1637,6 +1645,17 @@ static int brcm_pcie_probe(struct platform_device *pdev)
> > >               goto clk_out;
> > >       }
> > > 
> > > +     ret = reset_control_assert(pcie->swinit);
> > > +     if (ret) {
> > > +             dev_err_probe(&pdev->dev, ret, "could not assert reset 'swinit'\n");
> > > +             goto clk_out;
> > > +     }
> > > +     ret = reset_control_deassert(pcie->swinit);
> > > +     if (ret) {
> > > +             dev_err(&pdev->dev, "could not de-assert reset 'swinit' after asserting\n");
> > > +             goto clk_out;
> > > +     }
> > 
> > why not call reset_control_reset(pcie->swinit) directly?
> Hi Stan,
> 
> There is no reset_control_reset() method defined for reset-brcmstb.c.
> The only reason I can
> think of for this is that it allows the callers of assert/deassert to
> insert a delay if desired.

The main reason for the existence of reset_control_reset() is that
there are reset controllers that can only be triggered (e.g. by writing
a bit to a self-clearing register) to produce a complete reset pulse,
with assertion, delay, and deassertion all handled by the reset
controller.

regards
Philipp

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