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Message-Id: <20240708121224.1148154-1-xiao.w.wang@intel.com>
Date: Mon, 8 Jul 2024 20:12:24 +0800
From: Xiao Wang <xiao.w.wang@...el.com>
To: paul.walmsley@...ive.com,
palmer@...belt.com,
aou@...s.berkeley.edu,
atishp@...shpatra.org
Cc: anup@...infault.org,
linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Xiao Wang <xiao.w.wang@...el.com>
Subject: [PATCH] drivers/perf: riscv: Remove redundant macro check
The macro CONFIG_RISCV_PMU must have been defined when riscv_pmu.c gets
compiled, so this patch removes the redundant check.
Signed-off-by: Xiao Wang <xiao.w.wang@...el.com>
---
drivers/perf/riscv_pmu.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/perf/riscv_pmu.c b/drivers/perf/riscv_pmu.c
index 0a02e85a8951..7644147d50b4 100644
--- a/drivers/perf/riscv_pmu.c
+++ b/drivers/perf/riscv_pmu.c
@@ -39,7 +39,6 @@ void arch_perf_update_userpage(struct perf_event *event,
userpg->cap_user_time_short = 0;
userpg->cap_user_rdpmc = riscv_perf_user_access(event);
-#ifdef CONFIG_RISCV_PMU
/*
* The counters are 64-bit but the priv spec doesn't mandate all the
* bits to be implemented: that's why, counter width can vary based on
@@ -47,7 +46,6 @@ void arch_perf_update_userpage(struct perf_event *event,
*/
if (userpg->cap_user_rdpmc)
userpg->pmc_width = to_riscv_pmu(event->pmu)->ctr_get_width(event->hw.idx) + 1;
-#endif
do {
rd = sched_clock_read_begin(&seq);
--
2.25.1
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