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Message-ID: <20240708032847.2998158-2-ruanjinjie@huawei.com>
Date: Mon, 8 Jul 2024 11:28:46 +0800
From: Jinjie Ruan <ruanjinjie@...wei.com>
To: <bjorn@...nel.org>, <paul.walmsley@...ive.com>, <palmer@...belt.com>,
	<aou@...s.berkeley.edu>, <peterz@...radead.org>, <mingo@...hat.com>,
	<acme@...nel.org>, <namhyung@...nel.org>, <mark.rutland@....com>,
	<alexander.shishkin@...ux.intel.com>, <jolsa@...nel.org>,
	<irogers@...gle.com>, <adrian.hunter@...el.com>, <kan.liang@...ux.intel.com>,
	<dev.mbstr@...il.com>, <samuel.holland@...ive.com>,
	<linux-riscv@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
	<linux-perf-users@...r.kernel.org>
CC: <ruanjinjie@...wei.com>
Subject: [PATCH v3 1/2] riscv: Fix fp alignment bug in perf_callchain_user()

The standard RISC-V calling convention said:
	"The stack grows downward and the stack pointer is always
	kept 16-byte aligned".

So perf_callchain_user() should check whether 16-byte aligned for fp.

Link: https://riscv.org/wp-content/uploads/2015/01/riscv-calling.pdf

Fixes: dbeb90b0c1eb ("riscv: Add perf callchain support")
Signed-off-by: Jinjie Ruan <ruanjinjie@...wei.com>
Cc: Björn Töpel <bjorn@...nel.org>
---
 arch/riscv/kernel/perf_callchain.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/kernel/perf_callchain.c b/arch/riscv/kernel/perf_callchain.c
index 3348a61de7d9..2932791e9388 100644
--- a/arch/riscv/kernel/perf_callchain.c
+++ b/arch/riscv/kernel/perf_callchain.c
@@ -62,7 +62,7 @@ void perf_callchain_user(struct perf_callchain_entry_ctx *entry,
 	perf_callchain_store(entry, regs->epc);
 
 	fp = user_backtrace(entry, fp, regs->ra);
-	while (fp && !(fp & 0x3) && entry->nr < entry->max_stack)
+	while (fp && !(fp & 0x7) && entry->nr < entry->max_stack)
 		fp = user_backtrace(entry, fp, 0);
 }
 
-- 
2.34.1


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