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Message-ID: <ZowpGi/q7MeS5iYO@Asurada-Nvidia>
Date: Mon, 8 Jul 2024 10:59:54 -0700
From: Nicolin Chen <nicolinc@...dia.com>
To: Will Deacon <will@...nel.org>
CC: <robin.murphy@....com>, <joro@...tes.org>, <jgg@...dia.com>,
<thierry.reding@...il.com>, <vdumpa@...dia.com>, <jonathanh@...dia.com>,
<linux-kernel@...r.kernel.org>, <iommu@...ts.linux.dev>,
<linux-arm-kernel@...ts.infradead.org>, <linux-tegra@...r.kernel.org>
Subject: Re: [PATCH v9 4/6] iommu/arm-smmu-v3: Add CS_NONE quirk for
CONFIG_TEGRA241_CMDQV
On Mon, Jul 08, 2024 at 12:29:28PM +0100, Will Deacon wrote:
> > With that, we cannot avoid an unconditional hard-coding tegra
> > function call even if we switch to an impl design:
> >
> > +static int acpi_smmu_impl_init(u32 model, struct arm_smmu_device *smmu)
> > +{
> > + /*
> > + * unconditional go through ACPI table to detect if there is a tegra241
> > + * implementation that extends SMMU with a CMDQV. The probe() will fill
> > + * the smmu->impl pointer upon success. Otherwise, fall back to regular
> > + * SMMU CMDQ.
> > + */
> > + tegra241_impl_acpi_probe(smmu);
>
> In-line the minimal DSDT parsing to figure out if we're on a Tegra part.
> If it's that bad, put it in a static inline in arm-smmu-v3.h.
OK. How about the following?
/* arm-smmu-v3.h */
static inline void arm_smmu_impl_acpi_dsdt_probe(struct arm_smmu_device *smmu,
struct acpi_iort_node *node)
{
tegra241_cmdqv_acpi_dsdt_probe(smmu, node);
}
/* arm-smmu-v3.c */
static int arm_smmu_impl_acpi_probe(struct arm_smmu_device *smmu,
struct acpi_iort_node *node)
{
/*
* DSDT might holds some SMMU extension, so we have no option but to go
* through ACPI tables unconditionally. This probe function should fill
* the smmu->impl pointer upon success. Otherwise, just carry on with a
* standard SMMU.
*/
arm_smmu_impl_acpi_dsdt_probe(smmu, node);
return 0;
}
> > + return 0;
> > +}
> >
> > As for arm_smmu_cmdq_needs_busy_polling, it doesn't really look
> > very optimal to me.
>
> "optimal" in what sense? In that you don't like how it smells, or that
> it's measurably bad?
It would potentially not work if someday an implementation has
two secondary queues? I got your point of making it an option
just like the existing ARM_SMMU_OPT_MSIPOLL though..
Thanks
Nicolin
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