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Message-ID: <20240709-add_qcs9100_llcc_compatible-v2-1-99d203616eed@quicinc.com>
Date: Tue, 9 Jul 2024 23:04:44 +0800
From: Tengfei Fan <quic_tengfan@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio
	<konrad.dybcio@...aro.org>,
        Conor Dooley <conor@...nel.org>, Rob Herring
	<robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>
CC: <kernel@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
        <linux-riscv@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, Tengfei Fan <quic_tengfan@...cinc.com>
Subject: [PATCH v2 1/2] dt-bindings: cache: qcom,llcc: Add QCS9100
 description

Add the cache controller compatible and register region descriptions for
QCS9100 platform.
QCS9100 is drived from SA8775p. Currently, both the QCS9100 and SA8775p
platform use non-SCMI resource. In the future, the SA8775p platform will
move to use SCMI resources and it will have new sa8775p-related device
tree. Consequently, introduce "qcom,qcs9100-llcc" to describe non-SCMI
based LLCC.

Signed-off-by: Tengfei Fan <quic_tengfan@...cinc.com>
---
 Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
index 68ea5f70b75f..a38c8b99099e 100644
--- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
+++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
@@ -21,6 +21,7 @@ properties:
   compatible:
     enum:
       - qcom,qdu1000-llcc
+      - qcom,qcs9100-llcc
       - qcom,sa8775p-llcc
       - qcom,sc7180-llcc
       - qcom,sc7280-llcc
@@ -85,6 +86,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,qcs9100-llcc
               - qcom,sa8775p-llcc
     then:
       properties:

-- 
2.25.1


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