linux-kernel - [PATCH v2 0/2] iommu/vt-d: Fix aligned pages for cache invalidation

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Message-Id: <20240709152643.28109-1-baolu.lu@linux.intel.com>
Date: Tue,  9 Jul 2024 23:26:41 +0800
From: Lu Baolu <baolu.lu@...ux.intel.com>
To: Joerg Roedel <joro@...tes.org>,
	Will Deacon <will@...nel.org>,
	Robin Murphy <robin.murphy@....com>,
	Kevin Tian <kevin.tian@...el.com>,
	Louis Maliyam <louispm@...gle.com>
Cc: iommu@...ts.linux.dev,
	linux-kernel@...r.kernel.org,
	Lu Baolu <baolu.lu@...ux.intel.com>
Subject: [PATCH v2 0/2] iommu/vt-d: Fix aligned pages for cache invalidation

The aligned pages for cache invalidation returned by
calculate_psi_aligned_address() are incorrect if the start pfn is not
aligned, which can lead to cache inconsistencies when qi_flush_piotlb()
uses the number of pages to flush caches for the first-stage
translation.

Fix this by updating the aligned pages once the address mask is adjusted.

Change log:

v2:
 - Add a new fix to Limit max address mask to MAX_AGAW_PFN_WIDTH.

v1: https://lore.kernel.org/linux-iommu/20240708121417.18705-1-baolu.lu@linux.intel.com/

Lu Baolu (2):
  iommu/vt-d: Limit max address mask to MAX_AGAW_PFN_WIDTH
  iommu/vt-d: Fix aligned pages in calculate_psi_aligned_address()

 drivers/iommu/intel/cache.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

-- 
2.34.1