linux-kernel - Re: [PATCH v3 0/5] Add board support for Sipeed LicheeRV Nano

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Message-Id: <172053886159.3452537.17376675816752046144.robh@kernel.org>
Date: Tue, 09 Jul 2024 09:30:09 -0600
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Thomas Bonnefille <thomas.bonnefille@...tlin.com>
Cc: Inochi Amaoto <inochiama@...look.com>, 
 Albert Ou <aou@...s.berkeley.edu>, Thomas Gleixner <tglx@...utronix.de>, 
 Chao Wei <chao.wei@...hgo.com>, Conor Dooley <conor.dooley@...rochip.com>, 
 Daniel Lezcano <daniel.lezcano@...aro.org>, 
 Thomas Petazzoni <thomas.petazzoni@...tlin.com>, 
 Chen Wang <unicorn_wang@...look.com>, 
 Samuel Holland <samuel.holland@...ive.com>, linux-riscv@...ts.infradead.org, 
 linux-kernel@...r.kernel.org, Palmer Dabbelt <palmer@...belt.com>, 
 Miquèl Raynal <miquel.raynal@...tlin.com>, 
 Paul Walmsley <paul.walmsley@...ive.com>, devicetree@...r.kernel.org, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>
Subject: Re: [PATCH v3 0/5] Add board support for Sipeed LicheeRV Nano


On Tue, 09 Jul 2024 12:07:15 +0200, Thomas Bonnefille wrote:
> The LicheeRV Nano is a RISC-V SBC based on the Sophgo SG2002 chip. Adds
> minimal device tree files for this board to make it boot to a basic
> shell.
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@...tlin.com>
> ---
> Changes in v3:
> - Remove /dts-v1/ directive from sg2002.dtsi file
> - Add disable-wp property to sdhci node to avoid having a write
>   protected SD card
> - Drop changes in cv18xx.dtsi and cv1800b.dtsi
> - Add fallback compatible to cv1800b in SDHCI node of sg2002.dtsi
> - Link to v2: https://lore.kernel.org/r/20240612-sg2002-v2-0-19a585af6846@bootlin.com
> 
> Changes in v2:
> - Add SDHCI support
> - Change device tree name to match the Makefile
> - Add oscillator frequency
> - Add aliases to other UARTs
> - Add aliases to GPIOs
> - Move compatible for SDHCI from common DT to specific DT
> - Link to v1: https://lore.kernel.org/r/20240527-sg2002-v1-0-1b6cb38ce8f4@bootlin.com
> 
> ---
> Thomas Bonnefille (5):
>       dt-bindings: interrupt-controller: Add SOPHGO SG2002 plic
>       dt-bindings: timer: Add SOPHGO SG2002 clint
>       dt-bindings: riscv: Add Sipeed LicheeRV Nano board compatibles
>       riscv: dts: sophgo: Add initial SG2002 SoC device tree
>       riscv: dts: sophgo: Add LicheeRV Nano board device tree
> 
>  .../interrupt-controller/sifive,plic-1.0.0.yaml    |  1 +
>  .../devicetree/bindings/riscv/sophgo.yaml          |  5 ++
>  .../devicetree/bindings/timer/sifive,clint.yaml    |  1 +
>  arch/riscv/boot/dts/sophgo/Makefile                |  1 +
>  .../boot/dts/sophgo/sg2002-licheerv-nano-b.dts     | 54 ++++++++++++++++++++++
>  arch/riscv/boot/dts/sophgo/sg2002.dtsi             | 32 +++++++++++++
>  6 files changed, 94 insertions(+)
> ---
> base-commit: d20f6b3d747c36889b7ce75ee369182af3decb6b
> change-id: 20240515-sg2002-93dce1d263be
> 
> Best regards,
> --
> Thomas Bonnefille <thomas.bonnefille@...tlin.com>
> 
> 
> 


My bot found new DTB warnings on the .dts files added or changed in this
series.

Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.

If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:

  pip3 install dtschema --upgrade


New warnings running 'make CHECK_DTBS=y sophgo/sg2002-licheerv-nano-b.dtb' for 20240709-sg2002-v3-0-af779c3d139d@...tlin.com:

arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dtb: mmc@...0000: compatible: ['sophgo,sg2002-dwcmshc', 'sophgo,cv1800b-dwcmshc'] is too long
	from schema $id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml#
arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dtb: mmc@...0000: Unevaluated properties are not allowed ('compatible' was unexpected)
	from schema $id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml#