linux-kernel - [PATCH v3 6/9] interconnect: qcom: qcs404: Add regmaps and more bus descriptions

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Message-ID: <20240709102728.15349-7-a39.skl@gmail.com>
Date: Tue,  9 Jul 2024 12:22:51 +0200
From: Adam Skladowski <a39.skl@...il.com>
To: 
Cc: phone-devel@...r.kernel.org,
	~postmarketos/upstreaming@...ts.sr.ht,
	Adam Skladowski <a39.skl@...il.com>,
	Georgi Djakov <djakov@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Konrad Dybcio <konrad.dybcio@...aro.org>,
	Neil Armstrong <neil.armstrong@...aro.org>,
	Vladimir Lypak <vladimir.lypak@...il.com>,
	Rajendra Nayak <quic_rjendra@...cinc.com>,
	Rohit Agarwal <quic_rohiagar@...cinc.com>,
	Danila Tikhonov <danila@...xyga.com>,
	Bjorn Andersson <andersson@...nel.org>,
	Stephan Gerhold <stephan.gerhold@...nkonzept.com>,
	Andrew Halaney <ahalaney@...hat.com>,
	Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
	Uwe Kleine-König <u.kleine-koenig@...gutronix.de>,
	Barnabas Czeman <barnabas.czeman@...nlining.org>,
	linux-arm-msm@...r.kernel.org,
	linux-pm@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Abel Vesa <abel.vesa@...aro.org>
Subject: [PATCH v3 6/9] interconnect: qcom: qcs404: Add regmaps and more bus descriptions

Currently we are lacking descriptions of regmaps, bus clocks
and types of busses, provide them.

Signed-off-by: Adam Skladowski <a39.skl@...il.com>
---
 drivers/interconnect/qcom/qcs404.c | 42 +++++++++++++++++++++++++++---
 1 file changed, 39 insertions(+), 3 deletions(-)

diff --git a/drivers/interconnect/qcom/qcs404.c b/drivers/interconnect/qcom/qcs404.c
index 91b2ccc56a33..63e9ff223ac4 100644
--- a/drivers/interconnect/qcom/qcs404.c
+++ b/drivers/interconnect/qcom/qcs404.c
@@ -10,6 +10,7 @@
 #include <linux/module.h>
 #include <linux/mod_devicetable.h>
 #include <linux/platform_device.h>
+#include <linux/regmap.h>
 
 
 #include "icc-rpm.h"
@@ -1067,10 +1068,22 @@ static struct qcom_icc_node * const qcs404_bimc_nodes[] = {
 	[SLAVE_BIMC_SNOC] = &slv_bimc_snoc,
 };
 
+static const struct regmap_config qcs404_bimc_regmap_config = {
+	.reg_bits = 32,
+	.reg_stride = 4,
+	.val_bits = 32,
+	.max_register = 0x80000,
+	.fast_io = true,
+};
+
 static const struct qcom_icc_desc qcs404_bimc = {
-	.bus_clk_desc = &bimc_clk,
+	.type = QCOM_ICC_BIMC,
 	.nodes = qcs404_bimc_nodes,
 	.num_nodes = ARRAY_SIZE(qcs404_bimc_nodes),
+	.bus_clk_desc = &bimc_clk,
+	.regmap_cfg = &qcs404_bimc_regmap_config,
+	.qos_offset = 0x8000,
+	.ab_coeff = 153,
 };
 
 static struct qcom_icc_node * const qcs404_pcnoc_nodes[] = {
@@ -1122,10 +1135,22 @@ static struct qcom_icc_node * const qcs404_pcnoc_nodes[] = {
 	[SLAVE_PCNOC_SNOC] = &slv_pcnoc_snoc,
 };
 
+static const struct regmap_config qcs404_pcnoc_regmap_config = {
+	.reg_bits = 32,
+	.reg_stride = 4,
+	.val_bits = 32,
+	.max_register = 0x15080,
+	.fast_io = true,
+};
+
 static const struct qcom_icc_desc qcs404_pcnoc = {
-	.bus_clk_desc = &bus_0_clk,
+	.type = QCOM_ICC_NOC,
 	.nodes = qcs404_pcnoc_nodes,
 	.num_nodes = ARRAY_SIZE(qcs404_pcnoc_nodes),
+	.bus_clk_desc = &bus_0_clk,
+	.qos_offset = 0x7000,
+	.keep_alive = true,
+	.regmap_cfg = &qcs404_pcnoc_regmap_config,
 };
 
 static struct qcom_icc_node * const qcs404_snoc_nodes[] = {
@@ -1151,10 +1176,21 @@ static struct qcom_icc_node * const qcs404_snoc_nodes[] = {
 	[SLAVE_LPASS] = &slv_lpass,
 };
 
+static const struct regmap_config qcs404_snoc_regmap_config = {
+	.reg_bits = 32,
+	.reg_stride = 4,
+	.val_bits = 32,
+	.max_register = 0x23080,
+	.fast_io = true,
+};
+
 static const struct qcom_icc_desc qcs404_snoc = {
-	.bus_clk_desc = &bus_1_clk,
+	.type = QCOM_ICC_NOC,
 	.nodes = qcs404_snoc_nodes,
 	.num_nodes = ARRAY_SIZE(qcs404_snoc_nodes),
+	.bus_clk_desc = &bus_1_clk,
+	.qos_offset = 0x11000,
+	.regmap_cfg = &qcs404_snoc_regmap_config,
 };
 
 
-- 
2.45.2