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Message-Id: <20240709123121.1452394-3-heiko@sntech.de>
Date: Tue, 9 Jul 2024 14:31:17 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: mturquette@...libre.com,
sboyd@...nel.org
Cc: robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
heiko@...ech.de,
quentin.schulz@...rry.de,
linux-clk@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org
Subject: [PATCH 2/6] clk: add driver for generic clock generators
In contrast to fixed clocks that are described as ungateable, boards
sometimes use additional clock generators for things like PCIe reference
clocks, that need actual supplies to get enabled and enable-gpios to be
toggled for them to work.
This adds a driver for those generic unconfigurable clock generators.
Signed-off-by: Heiko Stuebner <heiko@...ech.de>
---
drivers/clk/Kconfig | 7 ++
drivers/clk/Makefile | 1 +
drivers/clk/clk-generator.c | 133 ++++++++++++++++++++++++++++++++++++
3 files changed, 141 insertions(+)
create mode 100644 drivers/clk/clk-generator.c
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 3e9099504fad4..76c53ddc472ce 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -247,6 +247,13 @@ config COMMON_CLK_GEMINI
This driver supports the SoC clocks on the Cortina Systems Gemini
platform, also known as SL3516 or CS3516.
+config COMMON_CLK_GENERATOR
+ tristate "Clock driver for generic clock generators"
+ depends on GPIOLIB && REGULATOR
+ help
+ This driver supports generic clock generators that are not
+ configurable but need supplies to be enabled to run.
+
config COMMON_CLK_LAN966X
tristate "Generic Clock Controller driver for LAN966X SoC"
depends on HAS_IOMEM
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 4abe16c8ccdfe..9cb0801155771 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_COMMON_CLK_FIXED_MMIO) += clk-fixed-mmio.o
obj-$(CONFIG_COMMON_CLK_FSL_FLEXSPI) += clk-fsl-flexspi.o
obj-$(CONFIG_COMMON_CLK_FSL_SAI) += clk-fsl-sai.o
obj-$(CONFIG_COMMON_CLK_GEMINI) += clk-gemini.o
+obj-$(CONFIG_COMMON_CLK_GENERATOR) += clk-generator.o
obj-$(CONFIG_COMMON_CLK_ASPEED) += clk-aspeed.o
obj-$(CONFIG_MACH_ASPEED_G6) += clk-ast2600.o
obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o
diff --git a/drivers/clk/clk-generator.c b/drivers/clk/clk-generator.c
new file mode 100644
index 0000000000000..99737bab1f5ad
--- /dev/null
+++ b/drivers/clk/clk-generator.c
@@ -0,0 +1,133 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2024 Heiko Stuebner <heiko@...ech.de>
+ *
+ * Generic unconfigurable clock generators
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/err.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/slab.h>
+
+struct clk_generator {
+ struct device *dev;
+ struct clk_hw hw;
+ u32 rate;
+ struct regulator *supply;
+ struct gpio_desc *enable_gpio;
+};
+
+#define to_clk_generator(_hw) container_of(_hw, struct clk_generator, hw)
+
+static int clk_generator_prepare(struct clk_hw *hw)
+{
+ return regulator_enable(to_clk_generator(hw)->supply);
+}
+
+static void clk_generator_unprepare(struct clk_hw *hw)
+{
+ regulator_disable(to_clk_generator(hw)->supply);
+}
+
+static int clk_generator_enable(struct clk_hw *hw)
+{
+ gpiod_set_value(to_clk_generator(hw)->enable_gpio, 1);
+ return 0;
+}
+
+static void clk_generator_disable(struct clk_hw *hw)
+{
+ gpiod_set_value(to_clk_generator(hw)->enable_gpio, 0);
+}
+
+static unsigned long clk_generator_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ return to_clk_generator(hw)->rate;
+}
+
+const struct clk_ops clk_generator_ops = {
+ .prepare = clk_generator_prepare,
+ .unprepare = clk_generator_unprepare,
+ .enable = clk_generator_enable,
+ .disable = clk_generator_disable,
+ .recalc_rate = clk_generator_recalc_rate,
+};
+
+static int clk_generator_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct clk_generator *clkgen;
+ const char *clk_name;
+ int ret;
+
+ clkgen = devm_kzalloc(dev, sizeof(*clkgen), GFP_KERNEL);
+ if (!clkgen)
+ return -ENOMEM;
+
+ clkgen->dev = dev;
+
+ if (device_property_read_u32(dev, "clock-frequency", &clkgen->rate))
+ return -EIO;
+
+ ret = device_property_read_string(dev, "clock-output-names", &clk_name);
+ if (ret)
+ clk_name = fwnode_get_name(dev->fwnode);
+
+ clkgen->supply = devm_regulator_get_optional(dev, "vdd");
+ if (IS_ERR(clkgen->supply)) {
+ if (PTR_ERR(clkgen->supply) != -ENODEV)
+ return dev_err_probe(dev, PTR_ERR(clkgen->supply),
+ "failed to get regulator\n");
+ clkgen->supply = NULL;
+ }
+
+ clkgen->enable_gpio = devm_gpiod_get_optional(dev, "enable",
+ GPIOD_OUT_LOW);
+ if (IS_ERR(clkgen->enable_gpio))
+ return dev_err_probe(dev, PTR_ERR(clkgen->enable_gpio),
+ "failed to get gpio\n");
+
+ ret = gpiod_direction_output(clkgen->enable_gpio, 0);
+ if (ret < 0)
+ return ret;
+
+ clkgen->hw.init = CLK_HW_INIT_NO_PARENT(clk_name, &clk_generator_ops, 0);
+
+ /* register the clock */
+ ret = devm_clk_hw_register(dev, &clkgen->hw);
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "failed to register clock\n");
+
+ ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
+ &clkgen->hw);
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "failed to register clock provider\n");
+
+ return 0;
+}
+
+static const struct of_device_id clk_generator_ids[] = {
+ { .compatible = "clock-generator" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, clk_generator_ids);
+
+static struct platform_driver clk_generator_driver = {
+ .driver = {
+ .name = "clk_generator",
+ .of_match_table = clk_generator_ids,
+ },
+ .probe = clk_generator_probe,
+};
+module_platform_driver(clk_generator_driver);
+
+MODULE_AUTHOR("Heiko Stuebner <heiko@...ech.de>");
+MODULE_DESCRIPTION("Clock-generator driver");
+MODULE_LICENSE("GPL");
--
2.39.2
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