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Message-ID: <20240710162745.GA3212156-robh@kernel.org>
Date: Wed, 10 Jul 2024 10:27:45 -0600
From: Rob Herring <robh@...nel.org>
To: Tengfei Fan <quic_tengfan@...cinc.com>
Cc: Vinod Koul <vkoul@...nel.org>,
	Kishon Vijay Abraham I <kishon@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Wesley Cheng <quic_wcheng@...cinc.com>,
	linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	kernel@...cinc.com
Subject: Re: [PATCH v2] dt-bindings: phy: qcom,usb-snps-femto-v2: Add
 bindings for QCS9100

On Tue, Jul 09, 2024 at 08:46:19PM +0800, Tengfei Fan wrote:
> Document the compatible string for USB phy found in Qualcomm QCS9100
> SoC.
> QCS9100 is drived from SA8775p. Currently, both the QCS9100 and SA8775p
> platform use non-SCMI resource. In the future, the SA8775p platform will
> move to use SCMI resources and it will have new sa8775p-related device
> tree. Consequently, introduce "qcom,qcs9100-usb-hs-phy" to describe
> non-SCMI based USB phy.
> 
> Signed-off-by: Tengfei Fan <quic_tengfan@...cinc.com>
> ---
> Introduce support for the QCS9100 SoC device tree (DTSI) and the
> QCS9100 RIDE board DTS. The QCS9100 is a variant of the SA8775p.
> While the QCS9100 platform is still in the early design stage, the
> QCS9100 RIDE board is identical to the SA8775p RIDE board, except it
> mounts the QCS9100 SoC instead of the SA8775p SoC.
> 
> The QCS9100 SoC DTSI is directly renamed from the SA8775p SoC DTSI, and
> all the compatible strings will be updated from "SA8775p" to "QCS9100".
> The QCS9100 device tree patches will be pushed after all the device tree
> bindings and device driver patches are reviewed.

I'm not convinced this is not just pointless churn. Aren't we going to 
end up with 2 compatible strings for everything? SCMI should just change 
the providers, but otherwise the consumers are the same. I suppose if 
clocks are abstracted into power-domains (an abuse IMO) then the 
bindings change.

Why do we need to support both SCMI and not-SCMI for the same chip?

Rob

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