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Message-ID: <5e8240d1-01ee-4cd4-8b6c-df951325d86f@amd.com>
Date: Wed, 10 Jul 2024 19:26:27 -0400
From: Stewart Hildebrand <stewart.hildebrand@....com>
To: Bjorn Helgaas <bhelgaas@...gle.com>, Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>, Dave Hansen
<dave.hansen@...ux.intel.com>, "H. Peter Anvin" <hpa@...or.com>
CC: <x86@...nel.org>, <linux-pci@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 0/6] PCI: align small (<4k) BARs
On 7/9/24 09:35, Stewart Hildebrand wrote:
> This series sets the default minimum resource alignment to 4k for memory
> BARs. In preparation, it makes an optimization and addresses some corner
> cases observed when reallocating BARs. I consider the prepapatory
> patches to be prerequisites to changing the default BAR size.
Sorry, I meant for this to say default BAR "alignment", not "size"
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