linux-kernel - Re: intel CPU vulnerability NO

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <20240710061526.so5rjsg3trw337ep@desk>
Date: Tue, 9 Jul 2024 23:15:26 -0700
From: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
To: "Shanavas.K.S" <shanavasks@...il.com>
Cc: linux-kernel@...r.kernel.org
Subject: Re: intel CPU vulnerability NO_SSB whitelist for AIRMONT

On Tue, Jul 09, 2024 at 01:21:44PM +0530, Shanavas.K.S wrote:
> Hi All,
> This is in reference to
> https://github.com/torvalds/linux/blame/master/arch/x86/kernel/cpu/common.c#L1169.
> The whitelist for INTEL_ATOM_AIRMONT has NO_SSB enabled  which means
> cache speculation vulnerability(spectre 4,CVE-2018-3639) is not
> applicable to  this processor. But NO_SSB is not set for
> INTEL_ATOM_AIRMONT_NP and INTEL_ATOM_AIRMONT_MID. Are these settings
> missing for AIRMONT_NP and AIRMONT_MID or is there a real difference
> between cache speculation between these processors?

I believe they were released much later than AIRMONT and hence should be
enumerating MSR IA32_ARCH_CAPABILITIES[SSB_NO](bit 4). If you have these
system, is bit 4 not set?

If it is set there is no need to explicitly add NO_SSB to the table.