linux-kernel - Re: [PATCH v2 2/2] PCI: qcom-ep: Add HDMA support for QCS9100 SoC

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Message-ID: <417ff30e-87d9-4816-addc-943f96ec64ac@quicinc.com>
Date: Wed, 10 Jul 2024 15:18:36 +0800
From: Tengfei Fan <quic_tengfan@...cinc.com>
To: Bjorn Helgaas <helgaas@...nel.org>
CC: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        "Lorenzo
 Pieralisi" <lpieralisi@...nel.org>,
        Krzysztof Wilczyński
	<kw@...ux.com>,
        Rob Herring <robh@...nel.org>, Bjorn Helgaas
	<bhelgaas@...gle.com>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
	<conor+dt@...nel.org>, <kernel@...cinc.com>,
        <linux-pci@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 2/2] PCI: qcom-ep: Add HDMA support for QCS9100 SoC



On 7/10/2024 12:26 AM, Bjorn Helgaas wrote:
> On Tue, Jul 09, 2024 at 10:53:44PM +0800, Tengfei Fan wrote:
>> QCS9100 SoC supports the new Hyper DMA (HDMA) DMA Engine inside the DWC IP,
>> so add support for it by passing the mapping format and the number of
>> read/write channels count.
>>
>> The PCIe EP controller used on this SoC is of version 1.34.0, so a separate
>> config struct is introduced for the sake of enabling HDMA conditionally.
> 
> This patch doesn't add a new config struct.

Thank you for pointing out this. I will remove this commit message in 
the next version patch series.

> 
>> It should be noted that for the eDMA support (predecessor of HDMA), there
>> are no mapping format and channels count specified. That is because eDMA
>> supports auto detection of both parameters, whereas HDMA doesn't.
>>
>> QCS9100 is drived from SA8775p. Currently, both the QCS9100 and SA8775p
>> platform use non-SCMI resource. In the future, the SA8775p platform will
>> move to use SCMI resources and it will have new sa8775p-related device
>> tree. Consequently, introduce "qcom,qcs9100-pcie-ep" to the PCIe device
>> match table.
> 
> This series doesn't add the new SCMI stuff you mention.  It sounds
> like this should be deferred and added when you actually move to using
> SCMI resources.

This patch shouldn't be deferred.

This patch is used to support QSC9100. QCS9100 uses non-SCMI resources, 
so there is nothing related to SCMI in this patch.

Only SA8775p will move to use SCMI resources in the future.


> 
>> Signed-off-by: Tengfei Fan <quic_tengfan@...cinc.com>
>> ---
>>   drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c
>> index 236229f66c80..e2775f4ca7ee 100644
>> --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c
>> +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c
>> @@ -904,6 +904,7 @@ static const struct qcom_pcie_ep_cfg cfg_1_34_0 = {
>>   };
>>   
>>   static const struct of_device_id qcom_pcie_ep_match[] = {
>> +	{ .compatible = "qcom,qcs9100-pcie-ep", .data = &cfg_1_34_0},
>>   	{ .compatible = "qcom,sa8775p-pcie-ep", .data = &cfg_1_34_0},
>>   	{ .compatible = "qcom,sdx55-pcie-ep", },
>>   	{ .compatible = "qcom,sm8450-pcie-ep", },
>>
>> -- 
>> 2.25.1
>>

-- 
Thx and BRs,
Tengfei Fan