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Message-ID: <20240710121118.GA240905@bhelgaas>
Date: Wed, 10 Jul 2024 07:11:18 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: Krishna chaitanya chundru <quic_krichai@...cinc.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Jonathan Corbet <corbet@....net>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Rob Herring <robh@...nel.org>, linux-pci@...r.kernel.org,
linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, mhi@...ts.linux.dev,
quic_vbadigan@...cinc.com, quic_ramkri@...cinc.com,
quic_nitegupt@...cinc.com, quic_skananth@...cinc.com,
quic_parass@...cinc.com, Manivannan Sadhasivam <mani@...nel.org>
Subject: Re: [PATCH v7 2/4] PCI: qcom-ep: Add support for D-state change
notification
On Wed, Jul 10, 2024 at 04:38:15PM +0530, Krishna chaitanya chundru wrote:
> Add support to pass D-state change notification to Endpoint
> function driver.
Blank line between paragraphs.
> Read perst value to determine if the link is in D3Cold/D3hot.
I assume this reads the state of the PERST# signal driven by the host.
Style it to match the spec usage ("PERST#") to make that connection
clearer.
D3cold/D3hot is a device state and doesn't apply to a link. Link
states are L0, L1, L2, L3,etc. Also in cover letter.
I don't understand the connection between PERST# state and the device
D state. D3cold is defined to mean main power is absent. Is the
endpoint firmware still running when main power is absent?
> Reviewed-by: Manivannan Sadhasivam <mani@...nel.org>
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>
> ---
> drivers/pci/controller/dwc/pcie-qcom-ep.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c
> index 236229f66c80..817fad805c51 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c
> @@ -648,6 +648,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data)
> struct device *dev = pci->dev;
> u32 status = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_STATUS);
> u32 mask = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_MASK);
> + pci_power_t state;
> u32 dstate, val;
>
> writel_relaxed(status, pcie_ep->parf + PARF_INT_ALL_CLEAR);
> @@ -671,11 +672,16 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data)
> dstate = dw_pcie_readl_dbi(pci, DBI_CON_STATUS) &
> DBI_CON_STATUS_POWER_STATE_MASK;
> dev_dbg(dev, "Received D%d state event\n", dstate);
> - if (dstate == 3) {
> + state = dstate;
> + if (dstate == PCI_D3hot) {
> val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL);
> val |= PARF_PM_CTRL_REQ_EXIT_L1;
> writel_relaxed(val, pcie_ep->parf + PARF_PM_CTRL);
> +
> + if (gpiod_get_value(pcie_ep->reset))
> + state = PCI_D3cold;
> }
> + pci_epc_dstate_notify(pci->ep.epc, state);
> } else if (FIELD_GET(PARF_INT_ALL_LINK_UP, status)) {
> dev_dbg(dev, "Received Linkup event. Enumeration complete!\n");
> dw_pcie_ep_linkup(&pci->ep);
>
> --
> 2.42.0
>
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