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Message-ID:
 <PAXPR04MB8459724CAF741E00C61E8F5F88A42@PAXPR04MB8459.eurprd04.prod.outlook.com>
Date: Wed, 10 Jul 2024 02:22:48 +0000
From: Peng Fan <peng.fan@....com>
To: Wei Fang <wei.fang@....com>, "mturquette@...libre.com"
	<mturquette@...libre.com>, "sboyd@...nel.org" <sboyd@...nel.org>,
	"robh@...nel.org" <robh@...nel.org>, "conor+dt@...nel.org"
	<conor+dt@...nel.org>, "shawnguo@...nel.org" <shawnguo@...nel.org>,
	"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>, "festevam@...il.com"
	<festevam@...il.com>, "abelvesa@...nel.org" <abelvesa@...nel.org>, Clark Wang
	<xiaoning.wang@....com>
CC: "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"imx@...ts.linux.dev" <imx@...ts.linux.dev>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 2/3] clk: imx95: enable the clock of NETCMIX block control

> Subject: RE: [PATCH 2/3] clk: imx95: enable the clock of NETCMIX
> block control
> 
> > -----Original Message-----
> > From: Peng Fan <peng.fan@....com>
> > Sent: 2024年7月9日 22:13
> > To: Wei Fang <wei.fang@....com>; mturquette@...libre.com;
> > sboyd@...nel.org; robh@...nel.org; conor+dt@...nel.org;
> > shawnguo@...nel.org; s.hauer@...gutronix.de;
> festevam@...il.com;
> > abelvesa@...nel.org
> > Cc: linux-clk@...r.kernel.org; devicetree@...r.kernel.org;
> > imx@...ts.linux.dev; linux-arm-kernel@...ts.infradead.org;
> > linux-kernel@...r.kernel.org
> > Subject: RE: [PATCH 2/3] clk: imx95: enable the clock of NETCMIX
> block
> > control
> >
> > > Subject: [PATCH 2/3] clk: imx95: enable the clock of NETCMIX block
> > > control
> > >
> > > The NETCMIX block control consists of registers for configuration of
> > > peripherals in the NETC domain, so enable the clock of NETCMIX to
> > > support the configuration.
> > >
> > > Signed-off-by: Wei Fang <wei.fang@....com>
> > > ---
> > >  drivers/clk/imx/clk-imx95-blk-ctl.c | 1 +
> > >  1 file changed, 1 insertion(+)
> > >
> > > diff --git a/drivers/clk/imx/clk-imx95-blk-ctl.c
> > > b/drivers/clk/imx/clk- imx95-blk-ctl.c index
> > > 74f595f9e5e3..07c70c0a53d4 100644
> > > --- a/drivers/clk/imx/clk-imx95-blk-ctl.c
> > > +++ b/drivers/clk/imx/clk-imx95-blk-ctl.c
> > > @@ -419,6 +419,7 @@ static const struct of_device_id
> > > imx95_bc_of_match[] = {
> > >  	{ .compatible = "nxp,imx95-lvds-csr", .data =
> &lvds_csr_dev_data },
> > >  	{ .compatible = "nxp,imx95-display-csr", .data =
> > > &dispmix_csr_dev_data },
> > >  	{ .compatible = "nxp,imx95-vpu-csr", .data =
> &vpublk_dev_data },
> > > +	{ .compatible = "nxp,imx95-netcmix-blk-ctrl", },
> >
> > This should not be added here if no real clocks are included.
> >
> This is the first phase, and we are currently prioritizing supporting the
> RGMII interface of ENETC on upstream. We will add support for
> multiplexing of the RMII reference clock later.

No, please include clock changes, otherwise, this is
just let device tree node assigned-clock and power domains
setup by platform pre-probe code, and nothing else.

Regards,
Peng.

> 
> >
> > >  	{ /* Sentinel */ },
> > >  };
> > >  MODULE_DEVICE_TABLE(of, imx95_bc_of_match);
> > > --
> > > 2.34.1

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