linux-kernel - Re: [PATCH v7 2/3] PCI: microchip: Fix inbound address translation tables

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Message-ID: <b22a15d8-54d5-a8cf-717b-73c5af347755@linux.intel.com>
Date: Thu, 11 Jul 2024 14:05:19 +0300 (EEST)
From: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
To: daire.mcnamara@...rochip.com
cc: linux-pci@...r.kernel.org, devicetree@...r.kernel.org, 
    conor.dooley@...rochip.com, lpieralisi@...nel.org, kw@...ux.com, 
    robh@...nel.org, bhelgaas@...gle.com, LKML <linux-kernel@...r.kernel.org>, 
    linux-riscv@...ts.infradead.org, krzk+dt@...nel.org, conor+dt@...nel.org
Subject: Re: [PATCH v7 2/3] PCI: microchip: Fix inbound address translation
 tables

On Thu, 11 Jul 2024, daire.mcnamara@...rochip.com wrote:

> From: Daire McNamara <daire.mcnamara@...rochip.com>
> 
> On Microchip PolarFire SoC the PCIe Root Port can be behind one of three
> general purpose Fabric Interface Controller (FIC) buses that encapsulates
> an AXI-S bus. Depending on which FIC(s) the Root Port is connected
> through to CPU space, and what address translation is done by that FIC,
> the Root Port driver's inbound address translation may vary.
> 
> For all current supported designs and all future expected designs,
> inbound address translation done by a FIC on PolarFire SoC varies
> depending on whether PolarFire SoC in operating in coherent DMA mode or
> noncoherent DMA mode.
> 
> The setup of the outbound address translation tables in the Root Port
> driver only needs to handle these two cases.
> 
> Setup the inbound address translation tables to one of two address
> translations, depending on whether the rootport is being used with coherent
> DMA or noncoherent DMA.
> 
> Fixes: 6f15a9c9f941 ("PCI: microchip: Add Microchip Polarfire PCIe controller driver")
> Signed-off-by: Daire McNamara <daire.mcnamara@...rochip.com>
> Acked-by: Conor Dooley <conor.dooley@...rochip.com>

Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>

-- 
 i.