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Message-Id: <20240712-imx-se-if-v5-2-66a79903a872@nxp.com>
Date: Fri, 12 Jul 2024 11:49:57 +0530
From: Pankaj Gupta <pankaj.gupta@....com>
To: Jonathan Corbet <corbet@....net>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, Pankaj Gupta <pankaj.gupta@....com>,
Rob Herring <robh+dt@...nel.org>
Cc: linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org
Subject: [PATCH v5 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc
The NXP security hardware IP(s) like: i.MX EdgeLock Enclave, V2X etc.,
creates an embedded secure enclave within the SoC boundary to enable
features like:
- HSM
- SHE
- V2X
Secure-Enclave(s) communication interface are typically via message
unit, i.e., based on mailbox linux kernel driver. This driver enables
communication ensuring well defined message sequence protocol between
Application Core and enclave's firmware.
Driver configures multiple misc-device on the MU, for multiple
user-space applications, to be able to communicate over single MU.
It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc.
Signed-off-by: Pankaj Gupta <pankaj.gupta@....com>
---
.../devicetree/bindings/firmware/fsl,imx-se.yaml | 111 +++++++++++++++++++++
1 file changed, 111 insertions(+)
diff --git a/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
new file mode 100644
index 000000000000..bd99505de6e6
--- /dev/null
+++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
@@ -0,0 +1,111 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX HW Secure Enclave(s) EdgeLock Enclave
+
+maintainers:
+ - Pankaj Gupta <pankaj.gupta@....com>
+
+description: |
+ NXP's SoC may contain one or multiple embedded secure-enclave HW
+ IP(s) like i.MX EdgeLock Enclave, V2X etc. These NXP's HW IP(s)
+ enables features like
+ - Hardware Security Module (HSM),
+ - Security Hardware Extension (SHE), and
+ - Vehicular to Anything (V2X)
+
+ Communication interface to the secure-enclaves is based on the
+ messaging unit(s).
+
+properties:
+ $nodename:
+ pattern: "firmware@[0-9a-f]+$"
+
+ compatible:
+ enum:
+ - fsl,imx8ulp-se
+ - fsl,imx93-se
+ - fsl,imx95-se
+
+ reg:
+ maxItems: 1
+ description: Identifier of the communication interface to secure-enclave.
+
+ mboxes:
+ items:
+ - description: mailbox phandle to send message to se firmware
+ - description: mailbox phandle to receive message from se firmware
+
+ mbox-names:
+ description: two names are to be listed, one for rx and other one for tx.
+ The name can be any of the below list.
+ items:
+ - const: tx
+ - const: rx
+
+ memory-region:
+ items:
+ - description: The phandle to the reserved external memory, the only
+ accessible memoryregion to secure enclave(SE) firmware. It is an
+ optional property based on compatible.
+ (see bindings/reserved-memory/reserved-memory.txt)
+
+ sram:
+ items:
+ - description: It is an optional property based on compatible.
+
+required:
+ - compatible
+ - reg
+ - mboxes
+ - mbox-names
+
+allOf:
+ # memory-region
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx8ulp-se
+ - fsl,imx93-se
+ then:
+ required:
+ - memory-region
+ else:
+ properties:
+ memory-region: false
+
+ # sram
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx8ulp-se
+ then:
+ required:
+ - sram
+
+ else:
+ properties:
+ sram: false
+
+additionalProperties: false
+
+examples:
+ - |
+ firmware {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ firmware@0 {
+ compatible = "fsl,imx95-se";
+ reg = <0x0>;
+ mboxes = <&ele_mu0 0 0>, <&ele_mu0 1 0>;
+ mbox-names = "tx", "rx";
+ };
+ };
+...
--
2.34.1
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