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Message-ID:
 <MA0P287MB2822C4E2EEFB67F82458C390FEA62@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM>
Date: Fri, 12 Jul 2024 09:33:46 +0800
From: Chen Wang <unicorn_wang@...look.com>
To: Thomas Bonnefille <thomas.bonnefille@...tlin.com>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Paul Walmsley
 <paul.walmsley@...ive.com>, Inochi Amaoto <inochiama@...look.com>,
 Chao Wei <chao.wei@...hgo.com>, Conor Dooley <conor@...nel.org>
Cc: Albert Ou <aou@...s.berkeley.edu>, Palmer Dabbelt <palmer@...belt.com>,
 Samuel Holland <samuel.holland@...ive.com>,
 Thomas Gleixner <tglx@...utronix.de>,
 Daniel Lezcano <daniel.lezcano@...aro.org>,
 Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
 Miquèl Raynal <miquel.raynal@...tlin.com>,
 linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
 linux-riscv@...ts.infradead.org, Conor Dooley <conor.dooley@...rochip.com>
Subject: Re: [PATCH v4 0/4] Add board support for Sipeed LicheeRV Nano

hi, Conor,

How about letting me PR all the four patches in this patchset? Because 
they are all related to sophgo, it would be better to PR them together 
to avoid confusion.
Especially about the change of sifive,plic-1.0.0.yaml, my original 
understanding was that it should be handled by you.

Regards,

Chen

On 2024/7/11 18:01, Thomas Bonnefille wrote:
> The LicheeRV Nano is a RISC-V SBC based on the Sophgo SG2002 chip. Adds
> minimal device tree files for this board to make it boot to a basic
> shell.
>
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@...tlin.com>
> ---
> Changes in v4:
> - Add correct bindings configuration for SG2002 sdhci
> - Drop commit "dt-bindings: timer: Add SOPHGO SG2002 clint" because it
>    has already been merged in Daniel Lezcano git tree.
> - Link to v3: https://lore.kernel.org/r/20240709-sg2002-v3-0-af779c3d139d@bootlin.com
>
> Changes in v3:
> - Remove /dts-v1/ directive from sg2002.dtsi file
> - Add disable-wp property to sdhci node to avoid having a write
>    protected SD card
> - Drop changes in cv18xx.dtsi and cv1800b.dtsi
> - Add fallback compatible to cv1800b in SDHCI node of sg2002.dtsi
> - Link to v2: https://lore.kernel.org/r/20240612-sg2002-v2-0-19a585af6846@bootlin.com
>
> Changes in v2:
> - Add SDHCI support
> - Change device tree name to match the Makefile
> - Add oscillator frequency
> - Add aliases to other UARTs
> - Add aliases to GPIOs
> - Move compatible for SDHCI from common DT to specific DT
> - Link to v1: https://lore.kernel.org/r/20240527-sg2002-v1-0-1b6cb38ce8f4@bootlin.com
>
> ---
> Thomas Bonnefille (4):
>        dt-bindings: interrupt-controller: Add SOPHGO SG2002 plic
>        dt-bindings: riscv: Add Sipeed LicheeRV Nano board compatibles
>        riscv: dts: sophgo: Add initial SG2002 SoC device tree
>        riscv: dts: sophgo: Add LicheeRV Nano board device tree
>
>   .../interrupt-controller/sifive,plic-1.0.0.yaml    |  1 +
>   .../devicetree/bindings/riscv/sophgo.yaml          |  5 ++
>   arch/riscv/boot/dts/sophgo/Makefile                |  1 +
>   .../boot/dts/sophgo/sg2002-licheerv-nano-b.dts     | 54 ++++++++++++++++++++++
>   arch/riscv/boot/dts/sophgo/sg2002.dtsi             | 32 +++++++++++++
>   5 files changed, 93 insertions(+)
> ---
> base-commit: d20f6b3d747c36889b7ce75ee369182af3decb6b
> change-id: 20240515-sg2002-93dce1d263be
>
> Best regards,

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