linux-kernel - [tip: timers/core] clocksource/drivers/mips-gic-timer: Refine rating computation

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <172086581542.2215.1800394668023850103.tip-bot2@tip-bot2>
Date: Sat, 13 Jul 2024 10:16:55 -0000
From: "tip-bot2 for Jiaxun Yang" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Jiaxun Yang <jiaxun.yang@...goat.com>,
 Daniel Lezcano <daniel.lezcano@...aro.org>, x86@...nel.org,
 linux-kernel@...r.kernel.org
Subject: [tip: timers/core] clocksource/drivers/mips-gic-timer: Refine rating
 computation

The following commit has been merged into the timers/core branch of tip:

Commit-ID:     cc9b2c590ebacf656bb2063c2f6cbfb7ad7081f3
Gitweb:        https://git.kernel.org/tip/cc9b2c590ebacf656bb2063c2f6cbfb7ad7081f3
Author:        Jiaxun Yang <jiaxun.yang@...goat.com>
AuthorDate:    Wed, 12 Jun 2024 09:54:33 +01:00
Committer:     Daniel Lezcano <daniel.lezcano@...aro.org>
CommitterDate: Fri, 12 Jul 2024 16:07:05 +02:00

clocksource/drivers/mips-gic-timer: Refine rating computation

It is a good clocksource which usually go as fast as CPU core
and have a low access latency, so raise the base of rating
from Good to desired when we know that it has a stable frequency.

Increase frequency addend dividend to 10000000 (10MHz) to
reasonably accommodate multi GHz level clock, also cap rating
within current level.

Signed-off-by: Jiaxun Yang <jiaxun.yang@...goat.com>
Link: https://lore.kernel.org/r/20240612-mips-clks-v2-6-a57e6f49f3db@flygoat.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
---
 drivers/clocksource/mips-gic-timer.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
index b3ae38f..7a03d94 100644
--- a/drivers/clocksource/mips-gic-timer.c
+++ b/drivers/clocksource/mips-gic-timer.c
@@ -197,7 +197,11 @@ static int __init __gic_clocksource_init(void)
 	gic_clocksource.mask = CLOCKSOURCE_MASK(count_width);
 
 	/* Calculate a somewhat reasonable rating value. */
-	gic_clocksource.rating = 200 + gic_frequency / 10000000;
+	if (mips_cm_revision() >= CM_REV_CM3 || !IS_ENABLED(CONFIG_CPU_FREQ))
+		gic_clocksource.rating = 300; /* Good when frequecy is stable */
+	else
+		gic_clocksource.rating = 200;
+	gic_clocksource.rating += clamp(gic_frequency / 10000000, 0, 99);
 
 	ret = clocksource_register_hz(&gic_clocksource, gic_frequency);
 	if (ret < 0)