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Message-ID: <20240715084313.14098-1-rayyan.ansari@linaro.org>
Date: Mon, 15 Jul 2024 09:43:10 +0100
From: Rayyan Ansari <rayyan.ansari@...aro.org>
To: devicetree@...r.kernel.org
Cc: Rayyan Ansari <rayyan.ansari@...aro.org>,
Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
linux-arm-msm@...r.kernel.org,
linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH] dt-bindings: clock: qcom,turingcc: convert to dtschema
Convert the bindings for the Turing Clock Controller, currently only
used for QCS404, from the old text format to yaml.
Signed-off-by: Rayyan Ansari <rayyan.ansari@...aro.org>
---
.../bindings/clock/qcom,turingcc.txt | 19 --------
.../bindings/clock/qcom,turingcc.yaml | 47 +++++++++++++++++++
2 files changed, 47 insertions(+), 19 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/clock/qcom,turingcc.txt
create mode 100644 Documentation/devicetree/bindings/clock/qcom,turingcc.yaml
diff --git a/Documentation/devicetree/bindings/clock/qcom,turingcc.txt b/Documentation/devicetree/bindings/clock/qcom,turingcc.txt
deleted file mode 100644
index 126517de5f9a..000000000000
--- a/Documentation/devicetree/bindings/clock/qcom,turingcc.txt
+++ /dev/null
@@ -1,19 +0,0 @@
-Qualcomm Turing Clock & Reset Controller Binding
-------------------------------------------------
-
-Required properties :
-- compatible: shall contain "qcom,qcs404-turingcc".
-- reg: shall contain base register location and length.
-- clocks: ahb clock for the TuringCC
-- #clock-cells: from common clock binding, shall contain 1.
-- #reset-cells: from common reset binding, shall contain 1.
-
-Example:
- turingcc: clock-controller@...000 {
- compatible = "qcom,qcs404-turingcc";
- reg = <0x00800000 0x30000>;
- clocks = <&gcc GCC_CDSP_CFG_AHB_CLK>;
-
- #clock-cells = <1>;
- #reset-cells = <1>;
- };
diff --git a/Documentation/devicetree/bindings/clock/qcom,turingcc.yaml b/Documentation/devicetree/bindings/clock/qcom,turingcc.yaml
new file mode 100644
index 000000000000..0a57e42fb4d9
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,turingcc.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,turingcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Turing Clock & Reset Controller
+
+maintainers:
+ - Bjorn Andersson <andersson@...nel.org>
+
+properties:
+ compatible:
+ const: qcom,qcs404-turingcc
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 1
+
+ '#reset-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - '#clock-cells'
+ - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-qcs404.h>
+ turingcc: clock-controller@...000 {
+ compatible = "qcom,qcs404-turingcc";
+ reg = <0x00800000 0x30000>;
+ clocks = <&gcc GCC_CDSP_CFG_AHB_CLK>;
+
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
--
2.45.2
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