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Message-ID: <dd95d25c-4bea-4019-a5e4-e68f359516ef@suse.de>
Date: Mon, 15 Jul 2024 17:01:18 +0300
From: Stanimir Varbanov <svarbanov@...e.de>
To: Jim Quinlan <james.quinlan@...adcom.com>, linux-pci@...r.kernel.org,
Nicolas Saenz Julienne <nsaenz@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Cyril Brulebois <kibi@...ian.org>, Stanimir Varbanov <svarbanov@...e.de>,
Krzysztof Kozlowski <krzk@...nel.org>,
bcm-kernel-feedback-list@...adcom.com, jim2101024@...il.com
Cc: Florian Fainelli <florian.fainelli@...adcom.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Rob Herring <robh@...nel.org>, Philipp Zabel <p.zabel@...gutronix.de>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@...ts.infradead.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 10/12] PCI: brcmstb: Check return value of all
reset_control_xxx calls
On 7/11/24 01:16, Jim Quinlan wrote:
> In some cases the result of a reset_control_xxx() call have been ignored.
> Now we check all return values of such functions and propagate the error to
> the next level.
>
> Signed-off-by: Jim Quinlan <james.quinlan@...adcom.com>
> ---
> drivers/pci/controller/pcie-brcmstb.c | 100 ++++++++++++++++++--------
> 1 file changed, 71 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
> index c44a92217855..c334cc427fb7 100644
> --- a/drivers/pci/controller/pcie-brcmstb.c
> +++ b/drivers/pci/controller/pcie-brcmstb.c
> @@ -232,8 +232,8 @@ struct pcie_cfg_data {
> const enum pcie_type type;
> const bool has_phy;
> unsigned int num_inbound;
> - void (*perst_set)(struct brcm_pcie *pcie, u32 val);
> - void (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val);
> + int (*perst_set)(struct brcm_pcie *pcie, u32 val);
> + int (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val);
> };
>
> struct subdev_regulators {
> @@ -278,8 +278,8 @@ struct brcm_pcie {
> int num_memc;
> u64 memc_size[PCIE_BRCM_MAX_MEMC];
> u32 hw_rev;
> - void (*perst_set)(struct brcm_pcie *pcie, u32 val);
> - void (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val);
> + int (*perst_set)(struct brcm_pcie *pcie, u32 val);
> + int (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val);
> struct subdev_regulators *sr;
> bool ep_wakeup_capable;
> bool has_phy;
> @@ -742,13 +742,18 @@ static void __iomem *brcm7425_pcie_map_bus(struct pci_bus *bus,
> return base + DATA_ADDR(pcie);
> }
>
> -static void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val)
> +static int brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val)
> {
> + int ret = 0;
> +
> if (pcie->bridge) {
> if (val)
> - reset_control_assert(pcie->bridge);
> + ret = reset_control_assert(pcie->bridge);
> else
> - reset_control_deassert(pcie->bridge);
> + ret = reset_control_deassert(pcie->bridge);
> + if (ret)
> + dev_err(pcie->dev, "failed to %s 'bridge' reset, err=%d\n",
> + val ? "assert" : "deassert", ret);
> } else {
> u32 tmp, mask = RGR1_SW_INIT_1_INIT_GENERIC_MASK;
> u32 shift = RGR1_SW_INIT_1_INIT_GENERIC_SHIFT;
> @@ -757,9 +762,10 @@ static void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val
> tmp = (tmp & ~mask) | ((val << shift) & mask);
> writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
> }
In case you sending new version, please add a blank like here.
Reviewed-by: Stanimir Varbanov <svarbanov@...e.de>
~Stan
> + return ret;
> }
>
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