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Message-ID: <20240715-washable-keenly-a76abaa59f60@spud>
Date: Mon, 15 Jul 2024 17:09:23 +0100
From: Conor Dooley <conor@...nel.org>
To: Manikandan Muralidharan <manikandan.m@...rochip.com>
Cc: andrzej.hajda@...el.com, neil.armstrong@...aro.org, rfoss@...nel.org,
Laurent.pinchart@...asonboard.com, jonas@...boo.se,
jernej.skrabec@...il.com, airlied@...il.com, daniel@...ll.ch,
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Subject: Re: [PATCH v2 1/4] dt-bindings: display: bridge: add
sam9x75-mipi-dsi binding
On Mon, Jul 15, 2024 at 03:27:33PM +0530, Manikandan Muralidharan wrote:
> + clocks:
> + items:
> + - description:
> + Peripheral clock for the hardware block functionality
> + - description:
> + Generic clock to drive the D-PHY PLL block
What is "generic" about this clock?
> +
> + clock-names:
> + items:
> + - const: pclk
> + - const: refclk
nit: clk is redundant here, they're all clocks :)
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