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Message-ID: <20240716194008.3502068-1-tmaimon77@gmail.com>
Date: Tue, 16 Jul 2024 22:40:01 +0300
From: Tomer Maimon <tmaimon77@...il.com>
To: <linus.walleij@...aro.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
<conor+dt@...nel.org>, <avifishman70@...il.com>, <tali.perry1@...il.com>,
<joel@....id.au>, <venture@...gle.com>, <yuenn@...gle.com>,
<benjaminfair@...gle.com>
CC: <openbmc@...ts.ozlabs.org>, <linux-kernel@...r.kernel.org>,
<linux-gpio@...r.kernel.org>, <devicetree@...r.kernel.org>, Tomer Maimon
<tmaimon77@...il.com>
Subject: [PATCH v2 0/7] pinctrl: npcm8xx: pin configuration changes
This patch set addresses various pin configuration changes for the
Nuvoton NPCM8XX BMC SoC. The patches aim to enhance functionality,
remove unused pins, and improve overall pin management.
Addressed comments from:
- J. Neuschäfer: https://www.spinics.net/lists/linux-gpio/msg101303.html
- Jonas Gorski: https://www.spinics.net/lists/linux-gpio/msg101304.html
Changes since version 1:
- Squash the non-existent pins, groups and functions.
- Remove non-existent groups and functions from dt-bindings.
- Modify the commit message.
Tomer Maimon (7):
dt-bindings: pinctrl: npcm8xx: remove non-existent groups and
functions
pinctrl: nuvoton: npcm8xx: remove non-existent pins, groups, functions
pinctrl: nuvoton: npcm8xx: clear polarity before set both edge
pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36
pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins group
pinctrl: nuvoton: npcm8xx: modify clkrun and serirq pin configuration
pinctrl: nuvoton: npcm8xx: modify pins flags
.../pinctrl/nuvoton,npcm845-pinctrl.yaml | 70 +++++++++----------
drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 64 ++++++++---------
2 files changed, 65 insertions(+), 69 deletions(-)
--
2.34.1
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