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Message-Id: <20240717-dispcc-sm8550-fixes-v1-0-efb4d927dc9a@linaro.org>
Date: Wed, 17 Jul 2024 00:13:27 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Neil Armstrong <neil.armstrong@...aro.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: [PATCH 0/7] clk: qcom: merge SM8550 and SM8650 display clock
controller drivers
The SM8550 and SM8650 platforms have nearly the same dispcc block and
very similar drivers. Seeing fixes being applied to one of them, but not
another one, merge two drivers into a single codepiece.
Depends:
- https://lore.kernel.org/linux-arm-msm/20240716-topic-sm8650-upstream-fix-dispcc-v3-0-5bfd56c899da@linaro.org
(patches 1/3 and 3/3 only)
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
---
Dmitry Baryshkov (7):
clk: qcom: dispcc-sm8550: fix several supposed typos
clk: qcom: dispcc-sm8550: use rcg2_ops for mdss_dptx1_aux_clk_src
clk: qcom: dispcc-sm8550: make struct clk_init_data const
clk: qcom: dispcc-sm8650: Update the GDSC flags
clk: qcom: dispcc-sm8550: use rcg2_shared_ops for ESC RCGs
clk: qcom: fold dispcc-sm8650 info dispcc-sm8550
dt-bindings: clock: qcom,sm8650-dispcc: replace with symlink
drivers/clk/qcom/Kconfig | 14 +-
drivers/clk/qcom/Makefile | 1 -
drivers/clk/qcom/dispcc-sm8550.c | 198 +--
drivers/clk/qcom/dispcc-sm8650.c | 1796 ------------------------
include/dt-bindings/clock/qcom,sm8650-dispcc.h | 103 +-
5 files changed, 111 insertions(+), 2001 deletions(-)
---
base-commit: 03a20d00e8fa44a58a0d363847e7113aab79ab68
change-id: 20240716-dispcc-sm8550-fixes-64d758c2dd34
Best regards,
--
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
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