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Message-ID: <66963d0531f17_7063708a@njaxe.notmuch>
Date: Tue, 16 Jul 2024 11:27:33 +0200
From: Matteo Martelli <matteomartelli3@...il.com>
To: Maxime Ripard <mripard@...nel.org>,
Matteo Martelli <matteomartelli3@...il.com>
Cc: Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>,
Jaroslav Kysela <perex@...ex.cz>,
Takashi Iwai <tiwai@...e.com>,
Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>,
Marcus Cooper <codekipper@...il.com>,
Clément Péron <peron.clem@...il.com>,
linux-sound@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-sunxi@...ts.linux.dev,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/1] ASoC: sunxi: sun4i-i2s: fix LRCLK polarity in i2s
mode
Maxime Ripard wrote:
> On Tue, Jul 02, 2024 at 05:17:15PM GMT, Matteo Martelli wrote:
> > Maxime Ripard wrote:
> > > On Fri, Jun 07, 2024 at 10:04:43AM GMT, Matteo Martelli wrote:
> > > > Maxime Ripard wrote:
> > > > > > - /*
> > > > > > - * DAI clock polarity
> > > > > > - *
> > > > > > - * The setup for LRCK contradicts the datasheet, but under a
> > > > > > - * scope it's clear that the LRCK polarity is reversed
> > > > > > - * compared to the expected polarity on the bus.
> > > > > > - */
> > > > >
> > > > > I think we should keep that comment somewhere.
> > > >
> > > > I think that keeping that comment would be very misleading since the LRCLK
> > > > setup would not contradict the datasheet anymore [1][2].
> > > >
> > > > Also, do you recall any details about the mentioned scope test setup? Was i2s
> > > > mode tested in that occasion? It would help clarify the situation.
> > >
> > > I can't remember if I tested i2s, I think I did though. But most of the
> > > work was done on either TDM or DSP modes, and I remember very clearly
> > > that the LRCK polarity was inverted compared to what Allwinner documents.
> > >
> > > So the doc was, at best, misleading for these formats and we should keep
> > > the comments.
> >
> > Thanks for the reply Maxime, would you be able to point out the Allwinner
> > document part that is (or was) misleading? The current datasheets (see links
> > [1][2]) look correct, the current driver setup for TDM and DSP modes respects
> > those datasheets and it's not "reversed compared to the expected polarity on
> > the bus" as the comment states.
>
> I clearly remember having to debug something there, but I don't remember
> much more, sorry.
>
> I guess if you have tested on the H3 I2S, TDM and DSP and it all works
> as expected with your changes, go ahead and ignore my comment then.
I did test it on the A64 SoC only (all modes I2S, TDM and DSP working).
Best reguards,
Matteo
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