linux-kernel - Re: [PATCH v3 2/3] clk: qcom: dispcc-sm8650: add missing CLK_SET_RATE

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Message-ID: <dccttz5b44bl3lwmcaqz6wjx3n4sv3eq4yh6276vzwrtkcvqcw@qxhbo7bylnsg>
Date: Tue, 16 Jul 2024 14:20:50 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Neil Armstrong <neil.armstrong@...aro.org>
Cc: Bjorn Andersson <andersson@...nel.org>, 
	Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, 
	Konrad Dybcio <konrad.dybcio@...aro.org>, Taniya Das <quic_tdas@...cinc.com>, 
	linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/3] clk: qcom: dispcc-sm8650: add missing
 CLK_SET_RATE_PARENT flag

On Tue, Jul 16, 2024 at 11:05:22AM GMT, Neil Armstrong wrote:
> Add the missing CLK_SET_RATE_PARENT for the byte0_div_clk_src
> and byte1_div_clk_src, the clock rate should propagate to
> the corresponding _clk_src.
> 
> Fixes: 9e939f008338 ("clk: qcom: add the SM8650 Display Clock Controller driver")
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
> ---
>  drivers/clk/qcom/dispcc-sm8650.c | 2 ++
>  1 file changed, 2 insertions(+)

This doesn't seem correct, the byte1_div_clk_src is a divisor, so the
rate should not be propagated. Other platforms don't set this flag.

-- 
With best wishes
Dmitry