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Message-Id: <6e0ce232acfe952970e9b37402fe08a3678aa43a.1721196758.git.dsimic@manjaro.org>
Date: Wed, 17 Jul 2024 08:29:14 +0200
From: Dragan Simic <dsimic@...jaro.org>
To: linux-rockchip@...ts.infradead.org,
	dri-devel@...ts.freedesktop.org
Cc: heiko@...ech.de,
	hjc@...k-chips.com,
	andy.yan@...k-chips.com,
	maarten.lankhorst@...ux.intel.com,
	mripard@...nel.org,
	tzimmermann@...e.de,
	airlied@...il.com,
	daniel@...ll.ch,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	Ondrej Jirman <megi@....cz>
Subject: [PATCH] drm/rockchip: dsi: Reset ISP1 DPHY before powering it on

From: Ondrej Jirman <megi@....cz>

After a suspend and resume cycle, ISP1 stops receiving data, as observed
on the Pine64 PinePhone Pro, which is based on the Rockchip RK3399 SoC.
Re-initializing DPHY during the PHY power-on, if the SoC variant supports
initialization, fixes this issue.

[ dsimic: Added more details to the commit summary and description ]

Signed-off-by: Ondrej Jirman <megi@....cz>
Signed-off-by: Dragan Simic <dsimic@...jaro.org>
---
 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
index 4cc8ed8f4fbd..9ad48c6dfac3 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
@@ -1240,6 +1240,14 @@ static int dw_mipi_dsi_dphy_power_on(struct phy *phy)
 		goto err_phy_cfg_clk;
 	}
 
+	if (dsi->cdata->dphy_rx_init) {
+		ret = dsi->cdata->dphy_rx_init(phy);
+		if (ret < 0) {
+			DRM_DEV_ERROR(dsi->dev, "hardware-specific phy init failed: %d\n", ret);
+			goto err_pwr_on;
+		}
+	}
+
 	/* do soc-variant specific init */
 	if (dsi->cdata->dphy_rx_power_on) {
 		ret = dsi->cdata->dphy_rx_power_on(phy);

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