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Message-ID: <20240717072145.107412-1-amhetre@nvidia.com>
Date: Wed, 17 Jul 2024 07:21:45 +0000
From: Ashish Mhetre <amhetre@...dia.com>
To: <thierry.reding@...il.com>, <vdumpa@...dia.com>, <will@...nel.org>,
<robin.murphy@....com>, <joro@...tes.org>
CC: <linux-tegra@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
<iommu@...ts.linux.dev>, <linux-kernel@...r.kernel.org>, Ashish Mhetre
<amhetre@...dia.com>
Subject: [PATCH] iommu: arm-smmu: Fix Tegra workaround for PAGE_SIZE mappings
PAGE_SIZE can be 16KB for Tegra which is not supported by MMU-500 on
both Tegra194 and Tegra234. So, use 4KB mappings when PAGE_SIZE is 16KB.
Signed-off-by: Ashish Mhetre <amhetre@...dia.com>
---
drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c b/drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c
index 4b2994b6126d..bb621a94f6fe 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c
@@ -273,11 +273,12 @@ static int nvidia_smmu_init_context(struct arm_smmu_domain *smmu_domain,
* release of PMD entry and avoid translations seeing stale PMD entry in
* walk cache.
* Fix this by limiting the page mappings to PAGE_SIZE on Tegra194 and
- * Tegra234.
+ * Tegra234. Use 4K page mappings if PAGE_SIZE is 16K as MMU500 doesn't
+ * support it.
*/
if (of_device_is_compatible(np, "nvidia,tegra234-smmu") ||
of_device_is_compatible(np, "nvidia,tegra194-smmu")) {
- smmu->pgsize_bitmap = PAGE_SIZE;
+ smmu->pgsize_bitmap = (PAGE_SIZE == SZ_16K) ? SZ_4K : PAGE_SIZE;
pgtbl_cfg->pgsize_bitmap = smmu->pgsize_bitmap;
}
--
2.25.1
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