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Message-ID: <20240717081027.2079549-8-akshay.gupta@amd.com>
Date: Wed, 17 Jul 2024 08:10:26 +0000
From: Akshay Gupta <akshay.gupta@....com>
To: <linux-hwmon@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: <linux@...ck-us.net>, <gregkh@...uxfoundation.org>, <arnd@...db.de>,
<naveenkrishna.chatradhi@....com>, Akshay Gupta <akshay.gupta@....com>
Subject: [PATCH v2 7/8] misc: amd-sbi: Add supoort for register xfer
- Provide user register access over IOCTL.
Both register read and write are supported.
- APML interface does not provide a syncronysation method. By defining,
a register access path, we use APML modules and library for
all APML transactions. Without having to use external tools such as
i2c-tools, which may cause race conditions.
Signed-off-by: Akshay Gupta <akshay.gupta@....com>
Reviewed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@....com>
---
Changes since v1:
- bifurcated from previous patch 5
drivers/misc/amd-sbi/rmi-core.c | 22 ++++++++++++++++++++++
include/uapi/misc/amd-apml.h | 3 +++
2 files changed, 25 insertions(+)
diff --git a/drivers/misc/amd-sbi/rmi-core.c b/drivers/misc/amd-sbi/rmi-core.c
index 87bd2ffcbcc1..da223e47d5df 100644
--- a/drivers/misc/amd-sbi/rmi-core.c
+++ b/drivers/misc/amd-sbi/rmi-core.c
@@ -374,6 +374,24 @@ int rmi_mailbox_xfer(struct sbrmi_data *data,
return ret;
}
+static int rmi_register_xfer(struct sbrmi_data *data,
+ struct apml_message *msg)
+{
+ int ret;
+
+ mutex_lock(&data->lock);
+ if (msg->data_in.reg_in[RD_FLAG_INDEX])
+ ret = regmap_read(data->regmap,
+ msg->data_in.reg_in[REG_OFF_INDEX],
+ &msg->data_out.mb_out[RD_WR_DATA_INDEX]);
+ else
+ ret = regmap_write(data->regmap,
+ msg->data_in.reg_in[REG_OFF_INDEX],
+ msg->data_in.reg_in[REG_VAL_INDEX]);
+ mutex_unlock(&data->lock);
+ return ret;
+}
+
static long sbrmi_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
{
int __user *arguser = (int __user *)arg;
@@ -407,6 +425,10 @@ static long sbrmi_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
/* MCAMSR protocol */
ret = rmi_mca_msr_read(data, &msg);
break;
+ case APML_REG:
+ /* REG R/W */
+ ret = rmi_register_xfer(data, &msg);
+ break;
default:
pr_err("Command:0x%x not recognized\n", msg.cmd);
break;
diff --git a/include/uapi/misc/amd-apml.h b/include/uapi/misc/amd-apml.h
index 3d536f2c8815..6d74f4ffba10 100644
--- a/include/uapi/misc/amd-apml.h
+++ b/include/uapi/misc/amd-apml.h
@@ -10,6 +10,7 @@
enum apml_protocol {
APML_CPUID = 0x1000,
APML_MCA_MSR,
+ APML_REG,
};
/* These are byte indexes into data_in and data_out arrays */
@@ -28,6 +29,7 @@ struct apml_message {
* Mailbox Messages: 0x0 ... 0x999
* APML_CPUID: 0x1000
* APML_MCA_MSR: 0x1001
+ * APML_REG: 0x1002
*/
__u32 cmd;
@@ -45,6 +47,7 @@ struct apml_message {
/*
* [0]...[3] mailbox 32bit input
* cpuid & mca msr,
+ * rmi rd/wr: reg_offset
* [4][5] cpuid & mca msr: thread
* [4] rmi reg wr: value
* [6] cpuid: ext function & read eax/ebx or ecx/edx
--
2.44.0
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