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Message-ID: <7fcc309e-f1c9-4693-a2d1-76df85021dff@linaro.org>
Date: Wed, 17 Jul 2024 11:53:11 +0100
From: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
To: "Satya Priya Kakitapalli (Temp)" <quic_skakitap@...cinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Abhishek Sahu <absahu@...eaurora.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Stephen Boyd <sboyd@...eaurora.org>,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
Ajit Pandey <quic_ajipan@...cinc.com>,
Imran Shaik <quic_imrashai@...cinc.com>, Taniya Das <quic_tdas@...cinc.com>,
Jagadeesh Kona <quic_jkona@...cinc.com>
Subject: Re: [PATCH v2 5/6] clk: qcom: Add camera clock controller driver for
SM8150
On 15/07/2024 11:36, Satya Priya Kakitapalli (Temp) wrote:
> This clock is PoR ON clock and expected to be always enabled from HW
> perspective, we are just re-ensuring it is ON from probe. Modelling this
> clock is unnecessary, and we have been following this approach forĀ gdsc
> clock in all the recent chipsets, like for example sm8550 camcc.
Having a difficult time following the logic
- Re-enabling an already enabled always-on clock is necessary
- Modelling the always-on clock in the CCF to park it at XO is
unnecessary
I think that's a pretty vague argument to be honest.
---
bod
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