linux-kernel - [PATCH v3 2/3] PCI: Add AER bits #defines for PCIe to PCI/PCI-X Bridge

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Message-ID: <20240718062405.30571-3-LeoLiu-oc@zhaoxin.com>
Date: Thu, 18 Jul 2024 14:24:04 +0800
From: LeoLiu-oc <LeoLiu-oc@...oxin.com>
To: <rafael@...nel.org>, <lenb@...nel.org>, <james.morse@....com>,
	<tony.luck@...el.com>, <bp@...en8.de>, <bhelgaas@...gle.com>,
	<robert.moore@...el.com>, <yazen.ghannam@....com>, <avadhut.naik@....com>,
	<linux-acpi@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-pci@...r.kernel.org>, <acpica-devel@...ts.linux.dev>
CC: <CobeChen@...oxin.com>, <TimGuo@...oxin.com>, <TonyWWang-oc@...oxin.com>,
	<leoliu-oc@...oxin.com>, LeoLiuoc <LeoLiu-oc@...oxin.com>
Subject: [PATCH v3 2/3] PCI: Add AER bits #defines for PCIe to PCI/PCI-X Bridge

From: LeoLiuoc <LeoLiu-oc@...oxin.com>

Define secondary uncorrectable error mask register, secondary
uncorrectable error severity register and secondary error capabilities and
control register bits in AER capability for PCIe to PCI/PCI-X Bridge.
Please refer to PCIe to PCI/PCI-X Bridge Specification r1.0, sec 5.2.3.2,
5.2.3.3 and 5.2.3.4.

Signed-off-by: LeoLiuoc <LeoLiu-oc@...oxin.com>
---
 include/uapi/linux/pci_regs.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 94c00996e633..09c788597be9 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -802,6 +802,9 @@
 #define  PCI_ERR_ROOT_FATAL_RCV		0x00000040 /* Fatal Received */
 #define  PCI_ERR_ROOT_AER_IRQ		0xf8000000 /* Advanced Error Interrupt Message Number */
 #define PCI_ERR_ROOT_ERR_SRC	0x34	/* Error Source Identification */
+#define PCI_ERR_UNCOR_MASK2	0x30    /* PCIe to PCI/PCI-X Bridge */
+#define PCI_ERR_UNCOR_SEVER2	0x34    /* PCIe to PCI/PCI-X Bridge */
+#define PCI_ERR_CAP2	0x38    /* PCIe to PCI/PCI-X Bridge */
 
 /* Virtual Channel */
 #define PCI_VC_PORT_CAP1	0x04
-- 
2.34.1