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Message-ID: <CAMRc=Mc=8Sa76TOZujMMZcaF2Dc8OL_HKo=gXuj-YALaH4zKHg@mail.gmail.com>
Date: Thu, 18 Jul 2024 15:29:59 +0200
From: Bartosz Golaszewski <brgl@...ev.pl>
To: Jon Hunter <jonathanh@...dia.com>
Cc: Andrew Lunn <andrew@...n.ch>, Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>, "David S . Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
Bartosz Golaszewski <bartosz.golaszewski@...aro.org>,
"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>, Brad Griffis <bgriffis@...dia.com>
Subject: Re: [RESEND PATCH net-next v3 3/4] net: phy: aquantia: wait for the
GLOBAL_CFG to start returning real values
On Thu, Jul 18, 2024 at 3:04 PM Bartosz Golaszewski <brgl@...ev.pl> wrote:
>
> On Thu, Jul 18, 2024 at 2:23 PM Jon Hunter <jonathanh@...dia.com> wrote:
> >
> >
> > With the current -next and mainline we are seeing the following issue on
> > our Tegra234 Jetson AGX Orin platform ...
> >
> > Aquantia AQR113C stmmac-0:00: aqr107_fill_interface_modes failed: -110
> > tegra-mgbe 6800000.ethernet eth0: __stmmac_open: Cannot attach to PHY (error: -110)
> >
> >
> > We have tracked it down to this change and looks like our PHY does not
> > support 10M ...
> >
> > $ ethtool eth0
> > Settings for eth0:
> > Supported ports: [ ]
> > Supported link modes: 100baseT/Full
> > 1000baseT/Full
> > 10000baseT/Full
> > 1000baseKX/Full
> > 10000baseKX4/Full
> > 10000baseKR/Full
> > 2500baseT/Full
> > 5000baseT/Full
> >
> > The following fixes this for this platform ...
> >
> > diff --git a/drivers/net/phy/aquantia/aquantia_main.c b/drivers/net/phy/aquantia/aquantia_main.c
> > index d12e35374231..0b2db486d8bd 100644
> > --- a/drivers/net/phy/aquantia/aquantia_main.c
> > +++ b/drivers/net/phy/aquantia/aquantia_main.c
> > @@ -656,7 +656,7 @@ static int aqr107_fill_interface_modes(struct phy_device *phydev)
> > int i, val, ret;
> >
> > ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,
> > - VEND1_GLOBAL_CFG_10M, val, val != 0,
> > + VEND1_GLOBAL_CFG_100M, val, val != 0,
> > 1000, 100000, false);
> > if (ret)
> > return ret;
> >
> >
> > However, I am not sure if this is guaranteed to work for all?
>
> Ah cr*p. No, I don't think it is. We should take the first supported
> mode for a given PHY I think.
>
TBH I only observed the issue on AQR115C. I don't have any other model
to test with. Is it fine to fix it by implementing
aqr115_fill_interface_modes() that would first wait for this register
to return non-0 and then call aqr107_fill_interface_modes()?
Bartosz
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