| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20240719055859.4166887-10-Delphine_CC_Chiu@wiwynn.com>
Date: Fri, 19 Jul 2024 13:58:38 +0800
From: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>
To: patrick@...cx.xyz,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Joel Stanley <joel@....id.au>,
Andrew Jeffery <andrew@...econstruct.com.au>
Cc: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-aspeed@...ts.ozlabs.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v10 09/27] ARM: dts: aspeed: yosemite4: Enable interrupt setting for pca9555
Enable interrupt setting for pca9555
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 56 +++++++++++++++++--
1 file changed, 52 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index ee11b3b8e81f..92733a8ecf0b 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -832,30 +832,78 @@ power-sensor@12 {
gpio@20 {
compatible = "nxp,pca9555";
- reg = <0x20>;
+ pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "P48V-OCP-GPIO1","P48V-OCP-GPIO2",
+ "P48V-OCP-GPIO3","FAN-BOARD-0-REVISION-0-R",
+ "FAN-BOARD-0-REVISION-1-R","FAN-BOARD-1-REVISION-0-R",
+ "FAN-BOARD-1-REVISION-1-R","RST-MUX-R-N",
+ "RST-LED-CONTROL-FAN-BOARD-0-N","RST-LED-CONTROL-FAN-BOARD-1-N",
+ "RST-IOEXP-FAN-BOARD-0-N","RST-IOEXP-FAN-BOARD-1-N",
+ "PWRGD-LOAD-SWITCH-FAN-BOARD-0-R","PWRGD-LOAD-SWITCH-FAN-BOARD-1-R",
+ "","";
};
gpio@21 {
compatible = "nxp,pca9555";
- reg = <0x21>;
+ pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
+ reg = <0x21>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "HSC-OCP-SLOT-ODD-GPIO1","HSC-OCP-SLOT-ODD-GPIO2",
+ "HSC-OCP-SLOT-ODD-GPIO3","HSC-OCP-SLOT-EVEN-GPIO1",
+ "HSC-OCP-SLOT-EVEN-GPIO2","HSC-OCP-SLOT-EVEN-GPIO3",
+ "ADC-TYPE-0-R","ADC-TYPE-1-R",
+ "MEDUSA-BOARD-REV-0","MEDUSA-BOARD-REV-1",
+ "MEDUSA-BOARD-REV-2","MEDUSA-BOARD-TYPE",
+ "DELTA-MODULE-TYPE","P12V-HSC-TYPE",
+ "","";
};
gpio@22 {
compatible = "nxp,pca9555";
- reg = <0x22>;
+ pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
+ reg = <0x22>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "CARD-TYPE-SLOT1","CARD-TYPE-SLOT2",
+ "CARD-TYPE-SLOT3","CARD-TYPE-SLOT4",
+ "CARD-TYPE-SLOT5","CARD-TYPE-SLOT6",
+ "CARD-TYPE-SLOT7","CARD-TYPE-SLOT8",
+ "OC-P48V-HSC-0-N","FLT-P48V-HSC-0-N",
+ "OC-P48V-HSC-1-N","FLT-P48V-HSC-1-N",
+ "EN-P48V-AUX-0","EN-P48V-AUX-1",
+ "PWRGD-P12V-AUX-0","PWRGD-P12V-AUX-1";
};
gpio@23 {
compatible = "nxp,pca9555";
- reg = <0x23>;
+ pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
+ reg = <0x23>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "HSC1-ALERT1-R-N","HSC2-ALERT1-R-N",
+ "HSC3-ALERT1-R-N","HSC4-ALERT1-R-N",
+ "HSC5-ALERT1-R-N","HSC6-ALERT1-R-N",
+ "HSC7-ALERT1-R-N","HSC8-ALERT1-R-N",
+ "HSC1-ALERT2-R-N","HSC2-ALERT2-R-N",
+ "HSC3-ALERT2-R-N","HSC4-ALERT2-R-N",
+ "HSC5-ALERT2-R-N","HSC6-ALERT2-R-N",
+ "HSC7-ALERT2-R-N","HSC8-ALERT2-R-N";
};
temperature-sensor@48 {
--
2.25.1
Powered by blists - more mailing lists