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Message-ID: <a36e07a1-f4da-4d6f-9e68-929b77b70836@rivosinc.com>
Date: Fri, 19 Jul 2024 09:11:20 +0200
From: Clément Léger <cleger@...osinc.com>
To: Andrew Jones <ajones@...tanamicro.com>,
Samuel Holland <samuel.holland@...ive.com>
Cc: Palmer Dabbelt <palmer@...belt.com>, linux-riscv@...ts.infradead.org,
Albert Ou <aou@...s.berkeley.edu>, Andy Chiu <andy.chiu@...ive.com>,
Charlie Jenkins <charlie@...osinc.com>, Conor Dooley <conor@...nel.org>,
Evan Green <evan@...osinc.com>, Paul Walmsley <paul.walmsley@...ive.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH -fixes] riscv: cpufeature: Do not drop Linux-internal
extensions
On 18/07/2024 23:57, Andrew Jones wrote:
> On Thu, Jul 18, 2024 at 02:29:59PM GMT, Samuel Holland wrote:
>> The Linux-internal Xlinuxenvcfg ISA extension is omitted from the
>> riscv_isa_ext array because it has no DT binding and should not appear
>> in /proc/cpuinfo. The logic added in commit 625034abd52a ("riscv: add
>> ISA extensions validation callback") assumes all extensions are included
>> in riscv_isa_ext, and so riscv_resolve_isa() wrongly drops Xlinuxenvcfg
>> from the final ISA string. Instead, accept such Linux-internal ISA
>> extensions as if they have no validation callback.
>
> This assumes we'll never need a validation callback for a Linux-internal
> ISA extension. We can make that assumption now and change our mind
> later, but we could also add Xlinuxenvcfg to riscv_isa_ext now and
> modify the places where it matters (just print_isa?). If we add
> Xlinuxenvcfg to the array with a NULL name then we could do something
> like
>
> print_isa()
> {
> for (...) {
> ...
> if (!riscv_isa_ext[i].name)
> continue;
> }
> }
I would rather add it to the riscv_isa_ext[] array and avoid handling it
differently. There is already the xandespmu extension in this array so
xlinuxenvcfg can be added as well.
Thanks,
Clément
>
>>
>> Fixes: 625034abd52a ("riscv: add ISA extensions validation callback")
>> Signed-off-by: Samuel Holland <samuel.holland@...ive.com>
>> ---
>>
>> arch/riscv/kernel/cpufeature.c | 14 ++++++--------
>> 1 file changed, 6 insertions(+), 8 deletions(-)
>>
>> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
>> index 0366dc3baf33..dd25677d60de 100644
>> --- a/arch/riscv/kernel/cpufeature.c
>> +++ b/arch/riscv/kernel/cpufeature.c
>> @@ -457,28 +457,26 @@ static void __init riscv_resolve_isa(unsigned long *source_isa,
>> bitmap_copy(prev_resolved_isa, resolved_isa, RISCV_ISA_EXT_MAX);
>> for_each_set_bit(bit, source_isa, RISCV_ISA_EXT_MAX) {
>> ext = riscv_get_isa_ext_data(bit);
>> - if (!ext)
>> - continue;
>>
>> - if (ext->validate) {
>> + if (ext && ext->validate) {
>> ret = ext->validate(ext, resolved_isa);
>> if (ret == -EPROBE_DEFER) {
>> loop = true;
>> continue;
>> } else if (ret) {
>> /* Disable the extension entirely */
>> - clear_bit(ext->id, source_isa);
>> + clear_bit(bit, source_isa);
>> continue;
>> }
>> }
>>
>> - set_bit(ext->id, resolved_isa);
>> + set_bit(bit, resolved_isa);
>> /* No need to keep it in source isa now that it is enabled */
>> - clear_bit(ext->id, source_isa);
>> + clear_bit(bit, source_isa);
>>
>> /* Single letter extensions get set in hwcap */
>> - if (ext->id < RISCV_ISA_EXT_BASE)
>> - *this_hwcap |= isa2hwcap[ext->id];
>> + if (bit < RISCV_ISA_EXT_BASE)
>> + *this_hwcap |= isa2hwcap[bit];
>> }
>> } while (loop && memcmp(prev_resolved_isa, resolved_isa, sizeof(prev_resolved_isa)));
>> }
>> --
>> 2.45.1
>>
>
> If we'd rather leave Xlinuxenvcfg out of the array (and generally support
> extensions not in the array), then LGTM
>
> Reviewed-by: Andrew Jones <ajones@...tanamicro.com>
>
> Thanks,
> drew
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