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Message-ID: <20240720144257.200b4511@jic23-huawei>
Date: Sat, 20 Jul 2024 14:42:57 +0100
From: Jonathan Cameron <jic23@...nel.org>
To: Conor Dooley <conor@...nel.org>
Cc: Alisa-Dariana Roman <alisadariana@...il.com>, Alisa-Dariana Roman
 <alisa.roman@...log.com>, Jonathan Cameron <Jonathan.Cameron@...wei.com>,
 Michael Hennerich <michael.hennerich@...log.com>,
 linux-iio@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, Lars-Peter Clausen <lars@...afoo.de>, Rob
 Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor
 Dooley <conor+dt@...nel.org>
Subject: Re: [PATCH v7 3/4] dt-bindings: iio: adc: ad7192: Add clock
 provider

On Thu, 18 Jul 2024 16:14:17 +0100
Conor Dooley <conor@...nel.org> wrote:

> On Thu, Jul 18, 2024 at 12:25:34AM +0300, Alisa-Dariana Roman wrote:
> > Internal clock of AD719X devices can be made available on MCLK2 pin. Add
> > clock provider to support this functionality when clock cells property
> > is present.
> > 
> > The clock source can be either provided externally or the internal clock
> > is used. Pair of clocks and clock-names property is mutally exclusive
> > with #clock-cells property.
> > 
> > Modify second example to showcase the mode where internal clock is used.
> > 
> > Signed-off-by: Alisa-Dariana Roman <alisa.roman@...log.com>
> > ---
> >  .../devicetree/bindings/iio/adc/adi,ad7192.yaml     | 13 ++++++++++---
> >  1 file changed, 10 insertions(+), 3 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml
> > index c3adc32684cf..edfa4378e838 100644
> > --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml
> > +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml
> > @@ -42,13 +42,19 @@ properties:
> >      description:
> >        Optionally, either a crystal can be attached externally between MCLK1 and
> >        MCLK2 pins, or an external CMOS-compatible clock can drive the MCLK2
> > -      pin. If absent, internal 4.92MHz clock is used.
> > +      pin. If absent, internal 4.92MHz clock is used, which can be made
> > +      available on MCLK2 pin.
> >  
> >    clock-names:
> >      enum:
> >        - xtal
> >        - mclk
> >  
> > +  "#clock-cells":
> > +    const: 0
> > +    description:
> > +      If present when internal clock is used, configured as clock provider.
> > +
> >    interrupts:
> >      maxItems: 1
> >  
> > @@ -169,6 +175,8 @@ allOf:
> >        required:
> >          - clocks
> >          - clock-names
> > +      properties:
> > +        "#clock-cells": false  
> 
> Properties before required, otherwise
Tweaked whilst applying.

Thanks,

Jonathan

> Acked-by: Conor Dooley <conor.dooley@...rochip.com>
> 
> Cheers,
> Conor.
> 
> >  
> >  unevaluatedProperties: false
> >  
> > @@ -214,8 +222,7 @@ examples:
> >              spi-max-frequency = <1000000>;
> >              spi-cpol;
> >              spi-cpha;
> > -            clocks = <&ad7192_mclk>;
> > -            clock-names = "mclk";
> > +            #clock-cells = <0>;
> >              interrupts = <25 0x2>;
> >              interrupt-parent = <&gpio>;
> >              aincom-supply = <&aincom>;
> > -- 
> > 2.34.1
> >   


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