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Message-Id: <20240720210856.778014-9-heiko@sntech.de>
Date: Sat, 20 Jul 2024 23:08:54 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: heiko@...ech.de
Cc: ukleinek@...ian.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 6/8] arm64: dts: rockchip: enable sata1+2 on Qnap-TS433
The TS433 has 4 bays. The last two are accessed via a pci-connected
sata controller, while the first two are accessed via the rk3568's
sata controllers. Enable these two now.
Signed-off-by: Heiko Stuebner <heiko@...ech.de>
---
.../boot/dts/rockchip/rk3568-qnap-ts433.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index 4fbbdb735eb58..69bed01cbe4ed 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -80,6 +80,16 @@ &combphy0 {
status = "okay";
};
+/* connected to sata1 */
+&combphy1 {
+ status = "okay";
+};
+
+/* connected to sata2 */
+&combphy2 {
+ status = "okay";
+};
+
&gmac0 {
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
@@ -154,6 +164,14 @@ vcc5v0_otg_en: vcc5v0-otg-en {
};
};
+&sata1 {
+ status = "okay";
+};
+
+&sata2 {
+ status = "okay";
+};
+
&sdhci {
bus-width = <8>;
max-frequency = <200000000>;
--
2.39.2
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