linux-kernel - [PATCH v8 3/3] arm64: dts: rockchip: add DT entry for RNG to RK356x

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <c28cb9ad04062b6da66d9cac8adefa0edc0046ea.1721522430.git.daniel@makrotopia.org>
Date: Sun, 21 Jul 2024 01:48:38 +0100
From: Daniel Golle <daniel@...rotopia.org>
To: Daniel Golle <daniel@...rotopia.org>,
	Aurelien Jarno <aurelien@...el32.net>,
	Olivia Mackall <olivia@...enic.com>,
	Herbert Xu <herbert@...dor.apana.org.au>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Heiko Stuebner <heiko@...ech.de>,
	Philipp Zabel <p.zabel@...gutronix.de>,
	Dragan Simic <dsimic@...jaro.org>,
	Uwe Kleine-König <ukleinek@...ian.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Cristian Ciocaltea <cristian.ciocaltea@...labora.com>,
	Martin Kaiser <martin@...ser.cx>,
	Francesco Dolcini <francesco.dolcini@...adex.com>,
	Ard Biesheuvel <ardb@...nel.org>, linux-crypto@...r.kernel.org,
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH v8 3/3] arm64: dts: rockchip: add DT entry for RNG to RK356x

From: Aurelien Jarno <aurelien@...el32.net>

Enable the just added Rockchip RNG driver for RK356x SoCs.

Signed-off-by: Aurelien Jarno <aurelien@...el32.net>
Signed-off-by: Daniel Golle <daniel@...rotopia.org>
---
 arch/arm64/boot/dts/rockchip/rk3568.dtsi |  7 +++++++
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 10 ++++++++++
 2 files changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index f1be76a54ceb..b9c6b2dc87fa 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -257,6 +257,13 @@ power-domain@...568_PD_PIPE {
 	};
 };
 
+&rng {
+	rockchip,sample-count = <1000>;
+	quality = <900>;
+
+	status = "okay";
+};
+
 &usb_host0_xhci {
 	phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>;
 	phy-names = "usb2-phy", "usb3-phy";
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 4690be841a1c..d160a23fd495 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1113,6 +1113,16 @@ sdhci: mmc@...10000 {
 		status = "disabled";
 	};
 
+	rng: rng@...88000 {
+		compatible = "rockchip,rk3568-rng";
+		reg = <0x0 0xfe388000 0x0 0x4000>;
+		clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>;
+		clock-names = "core", "ahb";
+		resets = <&cru SRST_TRNG_NS>;
+		reset-names = "reset";
+		status = "disabled";
+	};
+
 	i2s0_8ch: i2s@...00000 {
 		compatible = "rockchip,rk3568-i2s-tdm";
 		reg = <0x0 0xfe400000 0x0 0x1000>;
-- 
2.45.2