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Message-ID: <87bk2pkuim.fsf@gmail.com>
Date: Mon, 22 Jul 2024 22:05:05 +0100
From: Punit Agrawal <punit.agrawal@...edance.com>
To: palmer@...belt.com, Palmer Dabbelt <palmer@...osinc.com>
Cc: paul.walmsley@...ive.com, costa.shul@...hat.com, aou@...s.berkeley.edu,
samitolvanen@...gle.com, corbet@....net,
Anup Patel <anup@...infault.org>, linux-doc@...r.kernel.org,
linux-kernel@...r.kernel.org, jesse@...osinc.com,
conor.dooley@...rochip.com, Yunhui Cui <cuiyunhui@...edance.com>,
andy.chiu@...ive.com, cleger@...osinc.com,
linux-riscv@...ts.infradead.org, jrtc27@...c27.com,
evan@...osinc.com, Punit Agrawal <punit.agrawal@...edance.com>
Subject: Re: [PATCH v4] RISC-V: Provide the frequency of time CSR via hwprobe
Punit Agrawal <punit.agrawal@...edance.com> writes:
> Hi,
>
> Yunhui Cui <cuiyunhui@...edance.com> writes:
>
>> From: Palmer Dabbelt <palmer@...osinc.com>
>>
>> The RISC-V architecture makes a real time counter CSR (via RDTIME
>> instruction) available for applications in U-mode but there is no
>> architected mechanism for an application to discover the frequency
>> the counter is running at. Some applications (e.g., DPDK) use the
>> time counter for basic performance analysis as well as fine grained
>> time-keeping.
>>
>> Add support to the hwprobe system call to export the time CSR
>> frequency to code running in U-mode.
>>
>> Signed-off-by: Palmer Dabbelt <palmer@...osinc.com>
>> Signed-off-by: Yunhui Cui <cuiyunhui@...edance.com>
>> Reviewed-by: Evan Green <evan@...osinc.com>
>> Reviewed-by: Anup Patel <anup@...infault.org>
>> Acked-by: Punit Agrawal <punit.agrawal@...edance.com>
>> ---
>> Documentation/arch/riscv/hwprobe.rst | 2 ++
>> arch/riscv/include/asm/hwprobe.h | 2 +-
>> arch/riscv/include/uapi/asm/hwprobe.h | 1 +
>> arch/riscv/kernel/sys_hwprobe.c | 5 +++++
>> 4 files changed, 9 insertions(+), 1 deletion(-)
>
> The commit looks ready to be merged. Will this picked up for the 6.11
> release?
>
> Once this is merged, we can send out the DPDK change relying on the
> newly added key.
I see the first part of RISC-V patches got merged for 6.11. Any chance
for this patch to still make it for this cycle?
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