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Message-ID: <20240722094226.21602-9-ysionneau@kalrayinc.com>
Date: Mon, 22 Jul 2024 11:41:19 +0200
From: ysionneau@...rayinc.com
To: linux-kernel@...r.kernel.org, Michael Turquette
<mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, Rob Herring
<robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Jonathan Borne <jborne@...rayinc.com>, Julian Vetter
<jvetter@...rayinc.com>, Yann Sionneau <ysionneau@...rayinc.com>
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org
Subject: [RFC PATCH v3 08/37] dt-bindings: Add binding for
kalray,coolidge-dsu-clock
From: Yann Sionneau <ysionneau@...rayinc.com>
Add binding for Kalray Coolidge DSU (Debug System Unit) clock.
Signed-off-by: Yann Sionneau <ysionneau@...rayinc.com>
---
Notes:
V2 -> V3: New patch
---
.../clock/kalray,coolidge-dsu-clock.yaml | 39 +++++++++++++++++++
1 file changed, 39 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/kalray,coolidge-dsu-clock.yaml
diff --git a/Documentation/devicetree/bindings/clock/kalray,coolidge-dsu-clock.yaml b/Documentation/devicetree/bindings/clock/kalray,coolidge-dsu-clock.yaml
new file mode 100644
index 0000000000000..a7f6239b17c12
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/kalray,coolidge-dsu-clock.yaml
@@ -0,0 +1,39 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/kalray,coolidge-dsu-clock.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Kalray Coolidge DSU Clock
+
+maintainers:
+ - Jonathan Borne <jborne@...rayinc.com>
+ - Julian Vetter <jvetter@...rayinc.com>
+ - Yann Sionneau <ysionneau@...rayinc.com>
+
+description: |
+ DSU Clock is a free running counter that runs at Cluster clock frequency.
+
+properties:
+ compatible:
+ const: kalray,coolidge-dsu-clock
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+required:
+ - reg
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ dsu_clock@...180 {
+ compatible = "kalray,coolidge-dsu-clock";
+ reg = <0x00 0xa44180 0x00 0x08>;
+ clocks = <&core_clk>;
+ };
--
2.45.2
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