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Message-ID: <Zp4uVfQa+Bt026xV@linaro.org>
Date: Mon, 22 Jul 2024 13:03:01 +0300
From: Abel Vesa <abel.vesa@...aro.org>
To: Johan Hovold <johan+linaro@...nel.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Sibi Sankar <quic_sibis@...cinc.com>,
Rajendra Nayak <quic_rjendra@...cinc.com>,
Xilin Wu <wuxilin123@...il.com>,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 02/12] arm64: dts: qcom: x1e80100-qcp: fix up PCIe6a
pinctrl node
On 24-07-22 11:54:49, Johan Hovold wrote:
> The PCIe6a pinctrl node appears to have been copied from the sc8280xp
> CRD dts, which has the NVMe on pcie2a and uses some funny indentation.
>
> Fix up the node name to match the x1e80100 use and label and use only
> tabs for indentation.
>
> Signed-off-by: Johan Hovold <johan+linaro@...nel.org>
Reviewed-by: Abel Vesa <abel.vesa@...aro.org>
> ---
> arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
> index 212ed20b3369..86735f07fbb5 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
> +++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
> @@ -665,7 +665,7 @@ nvme_reg_en: nvme-reg-en-state {
> bias-disable;
> };
>
> - pcie6a_default: pcie2a-default-state {
> + pcie6a_default: pcie6a-default-state {
> clkreq-n-pins {
> pins = "gpio153";
> function = "pcie6a_clk";
> @@ -681,11 +681,11 @@ perst-n-pins {
> };
>
> wake-n-pins {
> - pins = "gpio154";
> - function = "gpio";
> - drive-strength = <2>;
> - bias-pull-up;
> - };
> + pins = "gpio154";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> };
> };
>
> --
> 2.44.2
>
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