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Message-ID: <87bk2pk1h1.fsf@BLaptop.bootlin.com>
Date: Mon, 22 Jul 2024 15:20:10 +0200
From: Gregory CLEMENT <gregory.clement@...tlin.com>
To: Jiaxun Yang <jiaxun.yang@...goat.com>, Thomas Bogendoerfer
 <tsbogend@...ha.franken.de>, "paulburton@...nel.org"
 <paulburton@...nel.org>
Cc: "linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>,
 linux-kernel@...r.kernel.org, Théo Lebrun
 <theo.lebrun@...tlin.com>,
 Vladimir Kondratiev <vladimir.kondratiev@...ileye.com>, Tawfik Bayouk
 <tawfik.bayouk@...ileye.com>, Thomas Petazzoni
 <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH] MIPS: SMP-CPS: Fix address for GCR_ACCESS register for
 I6500

"Jiaxun Yang" <jiaxun.yang@...goat.com> writes:

> 在2024年7月19日七月 下午10:14,Gregory CLEMENT写道:
>> Unlike most other MIPS CPUs, the I6500 CPUs have different address
>> offsets for the Global CSR Access Privilege register. In the "MIPS64
>> I6500 Multiprocessing System Programmer's Guide," it is stated that
>> "the Global CSR Access Privilege register is located at offset 0x0120"
>> in section 5.4.
>>
>> However, this is not the case for other MIPS64 CPUs such as the
>> P6600. In the "MIPS64® P6600 Multiprocessing System Software User's
>> Guide," section 6.4.2.6 states that the GCR_ACCESS register has an
>> offset of 0x0020.
>
> Hi Gregory,
>
> I confirmed this is a CM3 feature rather than CPU core (Samruai) feature.
>
> Please use CM version to select register region.



> (And perhaps Cc stable for this patch?)

Actually, from my experience, the "Fixes:" tag is enough. The stable
teams (and their bots) extensively backport patches from the Linus tree.

Gregory

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