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Message-ID: <490c28cb-b3c9-4150-a5c2-c2ffb099018c@quicinc.com>
Date: Tue, 23 Jul 2024 17:51:49 +0800
From: Qingqing Zhou <quic_qqzhou@...cinc.com>
To: Krzysztof Kozlowski <k.kozlowski.k@...il.com>, <andersson@...nel.org>,
<konrad.dybcio@...aro.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
<conor+dt@...nel.org>, <ahalaney@...hat.com>,
<manivannan.sadhasivam@...aro.org>
CC: <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <stable@...r.kernel.org>
Subject: Re: [PATCH v2] arm64: dts: qcom: sa8775p: Mark APPS and PCIe SMMUs as
DMA coherent
在 7/23/2024 4:12 PM, Krzysztof Kozlowski 写道:
> On 23/07/2024 09:59, Qingqing Zhou wrote:
>> The SMMUs on sa8775p are cache-coherent. GPU SMMU is marked as such,
>> mark the APPS and PCIe ones as well.
>>
>> Fixes: 603f96d4c9d0 ("arm64: dts: qcom: add initial support for qcom sa8775p-ride")
>> Fixes: 2dba7a613a6e ("arm64: dts: qcom: sa8775p: add the pcie smmu node")
>>
>
> For the future: there is never, never a line break between tags.
OK, thanks for reviewing and sorry for this, will update in next version.
>
>> Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
>
> Best regards,
> Krzysztof
>
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