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Message-ID: <CAGb2v65WLShdZLBcKBUviHMWFOM4oZmwVHWzVqCfz2rKdnoWyA@mail.gmail.com>
Date: Tue, 23 Jul 2024 11:54:02 +0800
From: Chen-Yu Tsai <wens@...e.org>
To: Charlie Jenkins <charlie@...osinc.com>
Cc: Conor Dooley <conor@...nel.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Paul Walmsley <paul.walmsley@...ive.com>, 
	Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>, 
	Jisheng Zhang <jszhang@...nel.org>, Jernej Skrabec <jernej.skrabec@...il.com>, 
	Samuel Holland <samuel@...lland.org>, Samuel Holland <samuel.holland@...ive.com>, 
	Jonathan Corbet <corbet@....net>, Shuah Khan <shuah@...nel.org>, Guo Ren <guoren@...nel.org>, 
	Evan Green <evan@...osinc.com>, Andy Chiu <andy.chiu@...ive.com>, 
	Jessica Clarke <jrtc27@...c27.com>, Andrew Jones <ajones@...tanamicro.com>, 
	linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-sunxi@...ts.linux.dev, 
	linux-doc@...r.kernel.org, linux-kselftest@...r.kernel.org, 
	Conor Dooley <conor.dooley@...rochip.com>
Subject: Re: [PATCH v6 03/13] riscv: dts: allwinner: Add xtheadvector to the
 D1/D1s devicetree

On Tue, Jul 23, 2024 at 5:58 AM Charlie Jenkins <charlie@...osinc.com> wrote:
>
> The D1/D1s SoCs support xtheadvector so it can be included in the
> devicetree. Also include vlenb for the cpu.
>
> Signed-off-by: Charlie Jenkins <charlie@...osinc.com>
> Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>

Acked-by: Chen-Yu Tsai <wens@...e.org>

Please take this with all the other patches.

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